About Using the Riviera-PRO Software with the Quartus II Software

You can perform an RTL functional simulation, post-synthesis simulation, and gate-level timing simulation of VHDL or Verilog HDL designs with the Aldec Riviera-PRO software. The following steps describe procedures for setting up the Riviera-PRO software and then performing each type of simulation:

1. Set up the Riviera-PRO working environment with the Riviera-PRO software

2. Perform an RTL Functional Simulation with the Riviera-PRO software

3. Perform a Post-Synthesis Simulation with the Riviera-PRO software

4. Perform a Gate-Level Simulation with the Riviera-PRO software