|
Stratix IV Device Handbook (27 MB)
Volume 1 - Stratix IV Device Handbook (ver 4.0, Nov 2009, 9 MB)
Section I. Device Core (4 MB)
- Chapter 1. Stratix IV デバイス・ファミリの概要 (ver 2.3, May 2009, 1 MB)
- Chapter 2. Stratix IV デバイスのロジック・アレイ・ブロックおよびアダプティブ・ロジック・モジュール (ver 2.2, Nov 2009, 902 KB)
- Chapter 3. Stratix IVデバイスのTriMatrix エンベデッド・メモリ・ブロック (ver 3.0, Nov 2009, 763 KB)
- Chapter 4. Stratix IVデバイスの DSPブロック (ver 3.0, Dec 2009, 1 MB)
- Chapter 5. Stratix IVデバイスのクロック・ネットワークおよびPLL (ver 3.0, Jan 2010, 2 MB)
Section II. I/O Interfaces (4 MB)
- Chapter 6. Stratix IVデバイスのI/O機能 (ver 3.0, Dec 2009, 2 MB)
- Chapter 7. Stratix IV デバイスの外部メモリ・インタフェース (ver 3.0, Feb 2010, 2 MB)
- Chapter 8. High Speed Differential I/O Interfaces with DPA in Stratix IV Devices (ver 3.0, Nov 2009, 1 MB)
Section III. System Integration (2 MB)
- Chapter 9. Stratix IV デバイスのホット・ソケットおよびパワー・オン・リセット (ver 2.2, Nov 2009, 248 KB)
- Chapter 10. Stratix IV デバイスのコンフィギュレーション、デザインのセキュリティ、およびリモート・システム・アップグレード (ver 3.0, Jan 2010, 2 MB)
- Chapter 11. Stratix IV デバイスにおけるSEUの緩和 (ver 1.0, Jan 2009, 496 KB)
- Chapter 12. Stratix IV デバイスのJTAGバウンダリ・スキャン・テスト (ver 2.3, Jun 2009, 132 KB)
- Chapter 13. Stratix IV デバイス消費電力管理 (ver 2.2, Nov 2009, 222 KB)
Volume 2 - Stratix IV Device Handbook (ver 4.0, Nov 2009, 17 MB)
Section I. Transceiver Architecture (17 MB)
- Chapter 1. Stratix IV トランシーバ・アーキテクチャ (ver 3.1, Jan 2010, 8 MB)
- Chapter 2. Stratix IV トランシーバのクロッキング (ver 2.2, Jan 2010, 3 MB)
- Chapter 3. トランシーバ・ブロックにおける複数のプロトコルおよびデータ・レートのコンフィギュレーション (ver 1.0, Jun 2008, 773 KB)
- Chapter 4. リセット・コントロール およびパワーダウン (ver 3.0, Jul 2009, 1 MB)
- Chapter 5. Stratix IV ダイナミック・リコンフィギュレーション (ver 2.0, Aug 2009, 5 MB)
- Chapter 6. Stratix IV GT Transceiver Architecture (ver 1.0, Mar 2009, 1 MB)
Volume 3 - Stratix IV Device Handbook (ver 4.0, Nov 2009, 2 MB)
Section I. Transceiver Configuration Guide (2 MB)
- Chapter 1. ALTGX トランシーバ設定ガイド (ver 3.0, Aug 2009, 6 MB)
- Chapter 2. トランシーバ・デザイン・フロー・ガイド (ver 3.0, Jul 2009, 3 MB)
- Chapter 3. Stratix IV ALTGX_RECONFIG メガファンクション・ユーザーガイド (旧Chapter 4) (ver 2.0, Jun 2009, 492 KB)
- Chapter 3. Porting a Stratix II GX Transceiver Design to a Stratix IV GX Device (ver 1.0, Nov 2008, 192 KB)
Volume 4 - Stratix IV Device Datasheet and Addendum (ver 4.1, Feb 2010, 1,002 KB)
Section I. Stratix IV Device Datasheet and Addendum (939 KB)
- Chapter 1. DC and Switching Characteristics (ver 4.1, Feb 2010, 780 KB)
- Chapter 2. Addendum to the Stratix IV Device Handbook (ver 1.1, Feb 2010, 211 KB)
関連資料
External Memory Interfaces
- External Memory PHY Interface Megafunction User Guide (ALTMEMPHY) (ver 7.2, Jul 2009, 9 MB)
- AN 520: DDR3 SDRAM インタフェースの終端およびレイアウト・ガイドライン (ver 1.1, Nov 2009, 2 MB)
- AN 461: Design Guidelines for Implementing QDRII+ and QDRII SRAM Interfaces in Stratix III and Stratix IV Devices (ver 1.2, Feb 2010, 986 KB)
Design Example for AN 461 (3 MB)
- AN 438: Constraining and Analyzing Timing for External Memory Interfaces in Stratix IV, Stratix III, Arria II GX, and Cyclone III Devices (ver 4.1, May 2009, 976 KB)
SIII_phase_shift (5 KB)
- AN 436: Using DDR3 SDRAM with Stratix III and Stratix IV Devices (ver 4.0, Nov 2008, 2 MB)
AN 436 Design Files (11 MB)
- AN 435: Using DDR and DDR2 SDRAM with Stratix III and Stratix IV Devices (ver 2.0, Aug 2008, 2 MB)
AN 435 Design Files (3 MB)
- AN 408: DDR2 Memory Interface Termination, Drive Strength, Loading, and Design Layout Guidelines (ver 2.1, Jul 2008, 4 MB)
SII Simulation Example (3 KB)
SIII Simulation Example (3 KB)
Power and Thermal Management
- Stratix III, Stratix IV, HardCopy III and HardCopy IV PowerPlay Early Power Estimator (ver 9.1 SP1, Jan 2010, 7 KB)
PowerPlay Early Power Estimator User Guide For Stratix III and Stratix IV FPGAs (600 KB)
- Voltage Regulator Selection for FPGAs (ver 1.0, Nov 2008, 306 KB)
- Stratix IV FPGAの消費電力管理およびその優位点 (ver 1.0, Aug 2008, 2 MB)
- アルテラの40 nm: ジッタ、シグナル・インテグリティ、電源、およびプロセスが最適化されたトランシーバ (ver 1.0, Aug 2008, 3 MB)
- PowerPlay Early Power Estimator User Guide For Stratix III and Stratix IV FPGAs (ver 2.0, May 2008, 1 MB)
- Stratix IV デバイス用電源供給ネットワーク （PDN） ツール・ユーザーガイド (ver 1.0, Aug 2009, 2 MB)
- 電源供給ネットワーク（PDN）ツール・ユーザーガイド (ver 2.0, Aug 2009, 2 MB)
- Device-Specific Power Delivery Network (PDN) Tool User Guide (ver 1.0, Nov 2009, 880 KB)
Power Delivery Network (PDN) Tool for Arria II GX Devices (2 MB)
Power Deliver Network (PDN) Tool for Stratix IV Devices (2 MB)
Power Delivery Network (PDN) Tool for Stratix III Devices (2 MB)
Power Delivery Network (PDN) Tool (2 MB)
- PowerPlay Early Power Estimator User Guide (ver 1.0, Nov 2009, 600 KB)
- AN 583: Designing Power Isolation Filters with Ferrite Beads for Altera FPGAs (ver 1.0, Jul 2009, 889 KB)
AN 583: VCC to VCCDPLL Spice Examples (159 KB)
- AN 574: Printed Circuit Board (PCB) Power Delivery Network (PDN) Design Methodology (ver 1.0, May 2009, 899 KB)
- AN 514: Stratix IV FPGA における消費電力の最適化 (ver 1.0, Jul 2009, 402 KB)
I/O Interfaces, Protocols and Signal Integrity
- SATA/SAS 対応の40nm FPGA ソリューション (ver 1.3, Jan 2010, 2 MB)
- アルテラの40 nm: ジッタ、シグナル・インテグリティ、電源、およびプロセスが最適化されたトランシーバ (ver 1.0, Aug 2008, 3 MB)
- PCI Express Compiler User Guide (ver 9.1 SP1, Feb 2010, 4 MB)
- トリプル・スピード・イーサネット MegaCore ファンクションユーザーガイド (ver 9.0, Aug 2009, 2 MB)
- Early SSN Estimator User Guide for Altera Programmable Devices (ver 1.0, Nov 2009, 788 KB)
Stratix IV Early SSN Estimator (615 KB)
- PCI Express hard intellectual property solutions from Altera (ver 2.0, Jul 2009, 165 KB)
- Transceiver Poster (ver 1.0, Feb 2009, 191 KB)
- AN 580: Achieving Timing Closure in Basic (PMA Direct) Functional Mode (ver 2.0, Feb 2010, 423 KB)
AN580_scripts.zip (17 KB)
- AN 578: Manual Placement of CMU PLLs and ATX PLLs in Stratix IV GX and GT Devices (ver 1.0, May 2009, 1 MB)
- AN 577: Recommended Protocol Configurations for Stratix IV GX FPGAs (ver 2.0, Dec 2009, 753 KB)
- AN 573: Implementing the Interlaken Protocol in Stratix IV Transceivers (ver 1.1, Dec 2009, 768 KB)
(Not applicable when designing with Stratix IV GX and Stratix IV GT engineering sample devices)
- AN 572: Implementing the Scalable SERDES Framer Interface (SFI-S) Protocol in Stratix IV GT Devices (ver 2.0, Jan 2010, 284 KB)
(Not applicable when designing with Stratix IV GT engineering sample devices)
- AN 571: Implementing the SERDES Framer Interface Level 5 (SFI-5.1) Protocol in Stratix IV Devices (ver 1.0, Jun 2009, 549 KB)
- AN 570: Implementing the 40G/100G Ethernet Protocol in Stratix IV Devices (ver 1.0, Jun 2009, 1 MB)
(Not applicable when designing with Stratix IV GT engineering sample devices)
- AN 553: Debugging Transceivers (ver 1.0, Jan 2009, 1 MB)
AN 553: Design Files (2 MB)
- AN 530: Optimizing Impedence Discontinuity Caused by Surface Mount Pads for High-Speed Channel Designs (ver 1.0, May 2008, 208 KB)
- AN 529: Via Optimization Techniques for High-Speed Channel Designs (ver 1.0, May 2008, 690 KB)
- AN 528: PCB Dielectric Material Selection and Fiber Weave Effect on High-Speed Channel Routing (ver 1.0, May 2008, 1 MB)
- AN 520: DDR3 SDRAM インタフェースの終端およびレイアウト・ガイドライン (ver 1.1, Nov 2009, 2 MB)
- AN 456: PCI Express High Performance Reference Design (ver 1.2, Aug 2009, 379 KB)
- AN 454: Implementing PLL Reconfiguration in Stratix III and Stratix IV Devices (ver 2.0, Dec 2009, 868 KB)
Design Examples 1 (412 KB)
Design Examples 2 (236 KB)
DSP
- アルテラ製品カタログ (ver 7.3, Feb 2010, 2 MB)
- Designing military DSP applications (ver 1.0, Apr 2009, 288 KB)
- think AND not OR - Altera @ 40 nmブローシャ (ver 1.1, Nov 2008, 478 KB)
Design Guidelines
- Avoiding PCB Design Mistakes in FPGA-Based Systems (ver 1.0, Mar 2009, 935 KB)
(Taray Inc.)
- Stratix IV Device Family Pin Connection Guidelines (ver 1.4, Sep 2009, 544 KB)
- AN 583: Designing Power Isolation Filters with Ferrite Beads for Altera FPGAs (ver 1.0, Jul 2009, 889 KB)
AN 583: VCC to VCCDPLL Spice Examples (159 KB)
- AN 574: Printed Circuit Board (PCB) Power Delivery Network (PDN) Design Methodology (ver 1.0, May 2009, 899 KB)
- AN 553: Debugging Transceivers (ver 1.0, Jan 2009, 1 MB)
AN 553: Design Files (2 MB)
- AN 520: DDR3 SDRAM インタフェースの終端およびレイアウト・ガイドライン (ver 1.1, Nov 2009, 2 MB)
- AN 519: Stratix IV デザイン・ガイドライン (ver 1.1, Jan 2010, 945 KB)
- AN 461: Design Guidelines for Implementing QDRII+ and QDRII SRAM Interfaces in Stratix III and Stratix IV Devices (ver 1.2, Feb 2010, 986 KB)
Design Example for AN 461 (3 MB)
PCB Layout and Packaging
- AN 553: Debugging Transceivers (ver 1.0, Jan 2009, 1 MB)
AN 553: Design Files (2 MB)
Development Kits
- Stratix IV GX FPGA Development Kit User Guide (ver 2.0, Nov 2009, 1 MB)
- Audio Video Development Kit, Stratix IV GX Edition User Guide (ver 2.0, Nov 2009, 1 MB)
- Transceiver Signal Integrity Kit, Stratix IV GT Edition User Guide (ver 1.0, Jan 2010, 403 KB)
- Stratix IV E FPGA Development Kit User Guide (ver 1.0, Nov 2009, 943 KB)
- アルテラ製品カタログ (ver 7.3, Feb 2010, 2 MB)
- Broadcast design solutions from Altera (ver 1.0, Feb 2009, 156 KB)
- Stratix IV GX FPGA Development Board Reference Manual (ver 2.0, Nov 2009, 2 MB)
- Transceiver Signal Integrity Development Kit, Stratix IV GT Edition Reference Manual (ver 1.0, Dec 2009, 1 MB)
- Stratix IV E FPGA Development Board Reference Manual (ver 1.0, Nov 2009, 2 MB)
- Transceiver Signal Integrity Development Kit, Stratix IV GX Edition Reference Manual (ver 2.0, Nov 2009, 1 MB)
- SDI HSMC Reference Manual (ver 1.0, Jul 2009, 1 MB)
End Applications
- Optical Transport Networks for 100G Implementation in FPGAs (ver 1.0, Oct 2009, 1 MB)
- Assessing FPGA DSP Benchmarks at 40 nm (ver 1.0, Mar 2009, 463 KB)
- Remote Radio Heads and the Evolution Towards 4G Networks (ver 1.1, Feb 2009, 718 KB)
(Radiocomp)
- Power-Optimized Solutions for Telecom Applications (ver 1.0, Jan 2009, 594 KB)
- Military Productivity Factors in Large FPGA Designs (ver 1.0, Jul 2008, 443 KB)
- Anti-Tamper Capabilities in FPGA Designs (ver 1.0, Jul 2008, 310 KB)
- DO-254 Support for FPGA Design Flows (ver 1.0, Jul 2008, 91 KB)
- 40-nm FPGAs and the Defense Electronic Design Organization (ver 1.0, Jul 2008, 313 KB)
- Military Benefits of the Managed Risk Process at 40 nm (ver 1.0, Jul 2008, 993 KB)
- FPGA Coprocessing Evolution: Sustained Performance Approaches Peak Performance (ver 1.1, Jun 2009, 303 KB)
- Designing base transceiver station (BTS) channel cards with transceiver FPGAs and ASICs (ver 1.0, Feb 2009, 141 KB)
- Designing remote radio head applications with transceiver FPGAs (ver 1.0, Feb 2009, 164 KB)
- Altera’s floating point solutions for military applications (ver 1.0, Apr 2009, 142 KB)
- Designing military DSP applications (ver 1.0, Apr 2009, 288 KB)
- FPGA companion chip solutions from Altera (ver 1.0, Nov 2009, 283 KB)
- HardCopy ASICs (ver 1.1, Jul 2008, 277 KB)
- GPON solutions from Altera (ver 2.0, Feb 2009, 143 KB)
- DO-254-certifiable IP cores (ver 2.0, Nov 2008, 119 KB)
- Broadcast design solutions from Altera (ver 1.0, Feb 2009, 156 KB)
- Enabling your core-to-edge applications for net-centric warfare (ver 2.0, Feb 2009, 137 KB)
- Enabling your core-to-edge applications for net-centric warfare (ver 2.0, Jun 2009, 139 KB)
General Device Documentation
- FPGAs at 40 nm and >10 Gbps: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers (ver 1.0, Apr 2009, 3 MB)
- 40-nm FPGAs: Architecture and Performance Comparison (ver 1.0, Dec 2008, 2 MB)
- 40G/100G アプリケーションにおける10 Gbps トランシーバの活用 (ver 1.2, Nov 2009, 2 MB)
- トランシーバーを内蔵した40 nmFPGA およびASICによる技術革新 (ver 1.2, Feb 2009, 1 MB)
- 40 nmプロセス・ノードによる最先端のカスタム・ロジック・デバイスの実現 (ver 1.0, Aug 2008, 1,010 KB)
- アルテラの40 nm: ジッタ、シグナル・インテグリティ、電源、およびプロセスが最適化されたトランシーバ (ver 1.0, Aug 2008, 3 MB)
- アルテラ製品カタログ (ver 7.3, Feb 2010, 2 MB)
- HardCopy ASICs (ver 1.1, Jul 2008, 277 KB)
- think AND not OR - Altera @ 40 nmブローシャ (ver 1.1, Nov 2008, 478 KB)
