Mercury Device Configuration

Mercury^TM devices support the following configuration schemes:

Serial—Used to conserve pins
- Passive Serial (PS)
  - Uses an external intelligent host such as a PC, an enhanced configuration (EPC) device (PDF), or a microprocessor to control the configuration process synchronously and supply the configuration data serially to a Mercury device.
- JTAG
  - Configures the Mercury device via the IEEE Standard 1149.1 interface.
Parallel—Used for faster configuration
- Passive Parallel Synchronous (PPS)
  - Uses an external intelligent host, such as a PC or microprocessor, to control the configuration process synchronously and supply the configuration data in a parallel manor to the Mercury device. Each configuration data byte requires eight DCLK cycles. The configuration time in the PPS scheme is similar to the configuration time in the PS scheme provided the DCLK frequencies for both schemes are the same.
- Passive Parallel Asynchronous (PPA)
  - Uses an external intelligent host, such as a PC or microprocessor, to control the configuration process asynchronously and supply the configuration data in a parallel manor to the Mercury device.

For prototyping or debugging
- Using Altera Programming Cables
  - The Quartus^® II programmer supports configuring Mercury devices directly using PS or JTAG interfaces via Altera^® programming cables.
In the field
- Using an EPC Device (PDF)
  - The EPC device configures the Mercury device automatically after power up. However, you need to program the EPC device first. MAX Series Configuration Controller Using Flash Memory (PDF)
- - A MAX^® or MAX II device is used as a flash memory configuration controller to configure Altera FPGAs
  - Source code (ZIP)