Configuration scheme overview
APEXTM II devices support the following configuration schemes:
- Serial—Used to conserve pins
- Passive Serial (PS)
- Uses an external intelligent host such as a PC, an enhanced configuration (EPC) device (PDF), or a microprocessor to control the configuration process synchronously and supply the configuration data serially to the APEX II device.
- JTAG
- Configures APEX II devices via the IEEE Standard 1149.1 interface.
- Passive Serial (PS)
- Parallel—Used for faster configuration
- Fast Passive Parallel (FPP)
- Uses an external intelligent host, such as a PC, an EPC device (PDF) or a microprocessor, to control the configuration process synchronously and supply the configuration data in a parallel manor to the APEX II device.
- Passive Parallel Asynchronous (PPA)
- Uses an external intelligent host, such as a PC or a microprocessor, to control the configuration process asynchronously and supply the configuration data in a parallel manor to the APEX II device.
- Fast Passive Parallel (FPP)
How to configure APEX II devices
- For prototyping or debugging
- Using Altera Programming Cables
- The Quartus® II programmer supports configuring APEX II devices directly using PS or JTAG interfaces via Altera® programming cables.
- Using Altera Programming Cables
- In the field
- Using an EPC Device (PDF)
- The EPC device configures the APEX II device automatically after power up. However, you need to program the EPC device first. MAX Series Configuration Controller Using Flash Memory (PDF)
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- A MAX® or MAX II device is used as a flash memory configuration controller to configure Altera FPGAs.
- Source code (ZIP)
- Using an EPC Device (PDF)

