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Arria II GX ハンドブック
Arria II GX Device Handbook (15 MB)
Arria II GX Device Handbook, Volume 1 (ver 3.0, Jul 2010, 6 MB)
Section I. Device Core (3 MB)
- Chapter 1. Arria II GX Device Family Overview (ver 3.0, Jul 2010, 240 KB)
- Chapter 2. Logic Array Blocks and Adaptive Logic Modules in Arria II GX Devices (ver 1.1, Jun 2009, 271 KB)
- Chapter 3. Memory Blocks in Arria II GX Devices (ver 2.0, Nov 2009, 430 KB)
- Chapter 4. DSP Blocks in Arria II GX Devices (ver 3.0, Jul 2010, 940 KB)
- Chapter 5. Clock Networks and PLLs in Arria II GX Devices (ver 3.0, Jul 2010, 1 MB)
Section II. I/O Interfaces (2 MB)
- Chapter 6. I/O Features in Arria II GX Devices (ver 3.0, Jul 2010, 736 KB)
- Chapter 7. External Memory Interfaces in Arria II GX Devices (ver 3.0, Jul 2010, 812 KB)
- Chapter 8. High-Speed Differential I/O Interfaces and DPA in Arria II GX Devices (ver 3.0, Jul 2010, 891 KB)
Section III. System Integration (2 MB)
- Chapter 9. Configuration, Design Security, and Remote System Upgrades in Arria II GX Devices (ver 3.0, Jul 2010, 1 MB)
- Chapter 10. SEU Mitigation in Arria II GX Devices (ver 3.0, Jul 2010, 148 KB)
- Chapter 11. JTAG Boundary-Scan Testing (ver 3.0, Jul 2010, 169 KB)
- Chapter 12. Power Requirements for Arria II GX Devices (ver 2.0, Jul 2010, 71 KB)
Arria II GX Device Handbook Volume 2 (ver 2.0, Jul 2010, 9 MB)
Section I. Transceiver Architecture (9 MB)
- Chapter 1. Arria II GX Transceiver Architecture (ver 3.0, Jul 2010, 5 MB)
- Chapter 2. Arria II GX Transceiver Clocking (ver 2.0, Jul 2010, 2 MB)
- Chapter 3. Configuring Multiple Protocols and Data Rates (ver 2.0, Jul 2010, 377 KB)
- Chapter 4. Reset Control and Power Down (ver 2.0, Jul 2010, 778 KB)
Arria II GX Device Handbook Volume 3 (ver 3.0, Jul 2010, 535 KB)
Section I. Arria II GX Device Datasheet and Addendum (498 KB)
- Chapter 1. Arria II GX Device Datasheet (ver 3.0, Jul 2010, 474 KB)
- Chapter 2. Addendum to the Arria II GX Device Handbook (ver 1.2, Jul 2010, 44 KB)
関連資料
消費電力 & 熱管理
- Arria II GX PowerPlay Early Power Estimator (ver 10.0SP1, Aug 2010, 7 KB)

PowerPlay Early Power Estimator User Guide (1 MB)
- Device-Specific Power Delivery Network (PDN) Tool User Guide (ver 1.0, Nov 2009, 880 KB)
Power Delivery Network (PDN) Tool for Arria II GX Devices (2 MB)
Power Delivery Network (PDN) Tool for Cyclone IV Devices (2 MB)
Power Deliver Network (PDN) Tool for Stratix IV Devices (2 MB)
Power Delivery Network (PDN) Tool for Stratix III Devices (2 MB)
- PowerPlay Early Power Estimator User Guide (ver 2.0, Jul 2010, 1 MB)
I/O インタフェース、プロトコル、シグナル・インテグリティ
- SATA/SAS 対応の40nm FPGA ソリューション (ver 1.3, Jan 2010, 2 MB)
- Early SSN Estimator User Guide for Altera Programmable Devices (ver 1.0, Nov 2009, 788 KB)
Arria II GX Early SSN Estimator (387 KB)
- Transceiver Poster (ver 1.0, Feb 2009, 191 KB)
- AN 558: Implementing Dynamic Reconfiguration in Arria II GX Devices (ver 3.0, Jul 2010, 3 MB)

- AN 456: PCI Express High Performance Reference Design (ver 1.2, Aug 2009, 379 KB)
DSP
- アルテラ製品カタログ (ver 7.4, Mar 2010, 2 MB)
- Designing military DSP applications (ver 1.0, Apr 2009, 288 KB)
デバイス・コンフィギュレーション & リモート・システム・アップグレード
- AN 603: Active Serial Remote System Upgrade Reference Design (ver 1.0, Apr 2010, 894 KB)
AN603 Design Files (1 MB)
デザイン・ガイドライン
- Arria II GX Device Family Pin Connection Guidelines (ver 1.2, Nov 2009, 366 KB)
- AN 603: Active Serial Remote System Upgrade Reference Design (ver 1.0, Apr 2010, 894 KB)
AN603 Design Files (1 MB)
- AN 601: Serial Digital Interface Reference Design for Arria II GX Devices (ver 1.0, Dec 2009, 582 KB)
Design Files for AN 601 (3 MB)
- AN 563: Arria II GX Design Guidelines (ver 1.0, Feb 2009, 752 KB)
開発キット
- Arria II GX FPGA Development Kit User Guide (ver 1.0, Jul 2009, 2 MB)
- Arria II GX FPGA Development Kit, 6G Edition User Guide (ver 1.0, Jul 2010, 2 MB)

- アルテラ製品カタログ (ver 7.4, Mar 2010, 2 MB)
- Broadcast design solutions from Altera (ver 1.0, Feb 2009, 156 KB)
- Arria II GX FPGA Development Board Reference Manual (ver 1.1, Oct 2009, 2 MB)
- Arria II GX FPGA Development Board, 6G Edition Reference Manual (ver 1.0, Jul 2010, 1 MB)

エンド・アプリケーション
- Optical Transport Networks for 100G Implementation in FPGAs (ver 1.1, Jul 2010, 689 KB)

- Leveraging Cost-Optimized FPGAs to Deliver OTN Mapper Solutions (ver 1.0, Oct 2009, 652 KB)
- Implementing a Multirate Uncompressed Video Interface for Broadcast Applications (ver 1.1, Jul 2010, 646 KB)

- Enabling Ethernet-Over-NG-SONET/SDH/PDH Solutions for MSPP Linecards (ver 1.0, Apr 2009, 102 KB)
- Simplifying Simultaneous Multimode RRH Hardware Design (ver 1.0, Mar 2009, 1 MB)
- Remote Radio Heads and the Evolution Towards 4G Networks (ver 1.1, Feb 2009, 718 KB)
(Radiocomp)
- Wireless End Market Solutions (ver 4.1, Jul 2010, 144 KB)

- Designing base transceiver station (BTS) channel cards with transceiver FPGAs and ASICs (ver 3.1, Jul 2010, 260 KB)

- Designing remote radio head applications with transceiver FPGAs (ver 2.1, Jul 2010, 262 KB)

- Video and image processing solutions for military applications (ver 2.0, Jun 2009, 278 KB)
- Designing military DSP applications (ver 1.0, Apr 2009, 288 KB)
- FPGA companion chip solutions from Altera (ver 1.0, Nov 2009, 283 KB)
- GPON solutions from Altera (ver 4.1, Jul 2010, 209 KB)

- Broadcast design solutions from Altera (ver 1.0, Feb 2009, 156 KB)
- Enabling your core-to-edge applications for net-centric warfare (ver 2.0, Feb 2009, 137 KB)
- Enabling your core-to-edge applications for net-centric warfare (ver 2.0, Jun 2009, 139 KB)
一般デバイス資料
- トランシーバーを内蔵した40 nmFPGA およびASICによる技術革新 (ver 1.2, Feb 2009, 1 MB)
- Leveraging the 40-nm Process Node to Deliver the World's Most Advanced Custom Logic Devices (ver 1.1, Feb 2009, 377 KB)
- アルテラ製品カタログ (ver 7.4, Mar 2010, 2 MB)
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関連資料
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