オンライン資料: Arria II GX デバイス

PowerPlay Early Power Estimator

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こちらの日本語版は参考用としてご利用ください。設計の際には、最新の英語版で内容をご確認ください。

Arria II GX ハンドブック

Arria II GX Device Handbook (14 MB)

Arria II GX Device Handbook Volume 1 (ver 2.0, Nov 2009, 6 MB)

Section I. Device Core (3 MB)

Chapter 1. Arria II GX Device Family Overview (ver 2.0, Nov 2009, 256 KB)
Chapter 2. Logic Array Blocks and Adaptive Logic Modules in Arria II GX Devices (ver 1.1, Jun 2009, 278 KB)
Chapter 3. Memory Blocks in Arria II GX Devices (ver 2.0, Nov 2009, 435 KB)
Chapter 4. DSP Blocks in Arria II GX Devices (ver 2.0, Nov 2009, 907 KB)
Chapter 5. Clock Networks and PLLs in Arria II GX Devices (ver 2.0, Nov 2009, 982 KB)

Section II. I/O Interfaces (2 MB)

Chapter 6. I/O Features in Arria II GX Devices (ver 2.0, Nov 2009, 677 KB)
Chapter 7. External Memory Interfaces in Arria II GX Devices (ver 2.0, Nov 2009, 751 KB)
Chapter 8. High-Speed Differential I/O Interfaces and DPA in Arria II GX Devices (ver 2.0, Nov 2009, 915 KB)

Section III. System Integration (2 MB)

Chapter 9. Configuration, Design Security, and Remote System Upgrades in Arria II GX Devices (ver 2.0, Nov 2009, 1 MB)
Chapter 10. SEU Mitigation in Arria II GX Devices (ver 2.0, Nov 2009, 177 KB)
Chapter 11. JTAG Boundary-Scan Testing (ver 2.0, Nov 2009, 169 KB)
Chapter 12. Power Requirements for Arria II GX Devices (ver 1.1, Jun 2009, 76 KB)

Arria II GX Device Handbook Volume 2 (ver 1.3, Nov 2009, 8 MB)

Section I. Transceiver Architecture (7 MB)

Chapter 1. Arria II GX Transceiver Architecture (ver 2.1, Nov 2009, 5 MB)
- AN 558: Implementing Dynamic Reconfiguration in Arria II GX Devices
Chapter 2. Arria II GX Transceiver Clocking (ver 1.1, Nov 2009, 2 MB)
Chapter 3. Configuring Multiple Protocols and Data Rates (ver 1.0, Feb 2009, 335 KB)
Chapter 4. Reset Control and Power Down (ver 1.1, Mar 2009, 743 KB)

Arria II GX Device Handbook Volume 3 (ver 2.1, Jan 2010, 499 KB)

Section I. Arria II GX Device Data Sheet and Addendum (463 KB)

Chapter 1. Arria II GX Device Data Sheet (ver 2.2, Feb 2010, 413 KB)
- Arria II GX I/O Timing Spreadsheet
Chapter 2. Addendum to the Arria II GX Device Handbook (ver 1.0, Jan 2010, 49 KB)

関連資料

External Memory Interfaces

AN 438: Constraining and Analyzing Timing for External Memory Interfaces in Stratix IV, Stratix III, Arria II GX, and Cyclone III Devices (ver 4.1, May 2009, 976 KB)
SIII_phase_shift (5 KB)

Power and Thermal Management

Arria II GX PowerPlay Early Power Estimator (ver 9.1, Nov 2009, 7 KB)
Arria II GX EPE user guide (600 KB)
Device-Specific Power Delivery Network (PDN) Tool User Guide (ver 1.0, Nov 2009, 880 KB)
     Power Delivery Network (PDN) Tool for Arria II GX Devices (2 MB)
     Power Deliver Network (PDN) Tool for Stratix IV Devices (2 MB)
     Power Delivery Network (PDN) Tool for Stratix III Devices (2 MB)
PowerPlay Early Power Estimator User Guide (ver 1.0, Nov 2009, 600 KB)
PowerPlay Early Power Estimator User Guide for Arria II GX FPGAs (ver 1.0, Mar 2009, 1 MB)

I/O Interfaces, Protocols and Signal Integrity

SATA/SAS 対応の40nm FPGA ソリューション (ver 1.3, Jan 2010, 2 MB)

ver 1.3, Mar 2009, 404 KB
Early SSN Estimator User Guide for Altera Programmable Devices (ver 1.0, Nov 2009, 788 KB)
Arria II GX Early SSN Estimator (387 KB)
Transceiver Poster (ver 1.0, Feb 2009, 191 KB)
AN 558: Implementing Dynamic Reconfiguration in Arria II GX Devices (ver 2.1, Jan 2010, 3 MB)
AN 456: PCI Express High Performance Reference Design (ver 1.2, Aug 2009, 379 KB)

DSP

アルテラ製品カタログ (ver 7.3, Feb 2010, 2 MB)

ver 7.1, Nov 2009, 815 KB
Designing military DSP applications (ver 1.0, Apr 2009, 288 KB)

Design Guidelines

Arria II GX Device Family Pin Connection Guidelines (ver 1.2, Nov 2009, 366 KB)
AN 601: Serial Digital Interface Reference Design for Arria II GX Devices (ver 1.0, Dec 2009, 582 KB)
Design Files for AN 601 (3 MB)
AN 563: Arria II GX Design Guidelines (ver 1.0, Feb 2009, 752 KB)

Development Kits

Arria II GX FPGA Development Kit User Guide (ver 1.0, Jul 2009, 2 MB)
アルテラ製品カタログ (ver 7.3, Feb 2010, 2 MB)

ver 7.1, Nov 2009, 815 KB
Broadcast design solutions from Altera (ver 1.0, Feb 2009, 156 KB)
Arria II GX FPGA Development Board Reference Manual (ver 1.1, Oct 2009, 2 MB)

End Applications

Optical Transport Networks for 100G Implementation in FPGAs (ver 1.0, Oct 2009, 1 MB)
Leveraging Cost-Optimized FPGAs to Deliver OTN Mapper Solutions (ver 1.0, Oct 2009, 652 KB)
Implementing a Multirate Uncompressed Video Interface for Broadcast Applications (ver 1.0, Mar 2009, 526 KB)
Enabling Ethernet-Over-NG-SONET/SDH/PDH Solutions for MSPP Linecards (ver 1.0, Apr 2009, 102 KB)
Simplifying Simultaneous Multimode RRH Hardware Design (ver 1.0, Mar 2009, 1 MB)
Remote Radio Heads and the Evolution Towards 4G Networks (ver 1.1, Feb 2009, 718 KB)
(Radiocomp)
Designing base transceiver station (BTS) channel cards with transceiver FPGAs and ASICs (ver 1.0, Feb 2009, 141 KB)
Designing remote radio head applications with transceiver FPGAs (ver 1.0, Feb 2009, 164 KB)
Video and image processing solutions for military applications (ver 2.0, Jun 2009, 278 KB)
Designing military DSP applications (ver 1.0, Apr 2009, 288 KB)
FPGA companion chip solutions from Altera (ver 1.0, Nov 2009, 283 KB)
GPON solutions from Altera (ver 2.0, Feb 2009, 143 KB)
Broadcast design solutions from Altera (ver 1.0, Feb 2009, 156 KB)
Enabling your core-to-edge applications for net-centric warfare (ver 2.0, Feb 2009, 137 KB)
Enabling your core-to-edge applications for net-centric warfare (ver 2.0, Jun 2009, 139 KB)

General Device Documentation

トランシーバーを内蔵した40 nmFPGA およびASICによる技術革新 (ver 1.2, Feb 2009, 1 MB)

ver 1.3, Mar 2009, 932 KB
Leveraging the 40-nm Process Node to Deliver the World's Most Advanced Custom Logic Devices (ver 1.1, Feb 2009, 377 KB)
アルテラ製品カタログ (ver 7.3, Feb 2010, 2 MB)

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