ࡱ>   !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~Root Entry 70JCache  Cells ࣠0J࣠0JParts ࣠0J࣠0J  !"$%&'()*+,-./0123456789>OrCAD Windows Library AJIJ"Arial"| BlockModify1Courier New290\LIBRARY2.OLBlck0Arialμμͼ̼@"Arial0"Arial4S100G5ES1F1517-1.Normal"ArialViews ࣠0J࣠0JLibrarysSymbols࣠0J 0J$Types$1ST PART FIELD2ND PART FIELD3RD PART FIELD4TH PART FIELD5TH PART FIELD6TH PART FIELD7TH PART FIELD PCB Footprintddd00ValuePart Reference SWAP_INFO0(S1+S2+S3+S4+S5+S6+S7+S8+S9+S10+S11+S12+S13+S14) SPLIT_INSTTRUENumberIJEP4S100G5ES1F1517-6K 0UEP4S100G5ES1Graphics ࣠0J 0J$Types$Packages ࣠0J 0JEP4S100G5ES1F1517$ EP4S100G5ES1F1517-6EP4S100G5ES1F1517-6.NormalEP4S100G5ES1F1517-6.Normal0(.nn"\EP4S100G5ES1F1517 (For ES1 silicon only) VERSION : 1.0 PAGE : 6 of 14 DATE : JUNE 2009 .l x"sNote : Pins with this symbol (***) can only be used as single-ended I/O. Please refer to pin-out file for details. C6IO_5C_AC10/PLL_R3_CLKOUT0N/DIFFIO_TX_R28N/DIFFOUT_R55N !9IO_5C_AC11/PLL_R3_FB_CLKOUT0P/DIFFIO_TX_R28P/DIFFOUT_R55P!4IO_5A_AM10/PLL_R4_CLKOUT0N/DIFFIO_TX_R1N/DIFFOUT_R1N!7IO_5A_AL10/PLL_R4_FB_CLKOUT0P/DIFFIO_TX_R1P/DIFFOUT_R1P((!RDN5A/DIFFIO_RX_R1N/DIFFOUT_R2N<<!RUP5A/DIFFIO_RX_R1P/DIFFOUT_R2PFF!51+IO_5A_AD12/DQ7R/DIFFIO_TX_R12N/DIFFOUT_R23NZZ!+IO_5A_AD13/DQ7R/DIFFIO_TX_R12P/DIFFOUT_R23Pdd!+IO_5A_AE12/DQ7R/DIFFIO_TX_R11N/DIFFOUT_R21Nnn!+IO_5A_AE13/DQ7R/DIFFIO_TX_R11P/DIFFOUT_R21Pxx!)IO_5A_AF13/DQ3R/DIFFIO_TX_R5P/DIFFOUT_R9P!)IO_5A_AG12/DQ2R/DIFFIO_TX_R4P/DIFFOUT_R7P!51)IO_5A_AG13/DQ3R/DIFFIO_TX_R5N/DIFFOUT_R9N!+IO_5A_AH10/DQ6R/DIFFIO_TX_R10P/DIFFOUT_R19P!)IO_5A_AH11/DQ1R/DIFFIO_TX_R3P/DIFFOUT_R5P!)IO_5A_AH12/DQ2R/DIFFIO_TX_R4N/DIFFOUT_R7N!+IO_5A_AJ10/DQ6R/DIFFIO_TX_R10N/DIFFOUT_R19N!)IO_5A_AJ11/DQ1R/DIFFIO_TX_R3N/DIFFOUT_R5N!)IO_5A_AK9/DQ5R/DIFFIO_TX_R8P/DIFFOUT_R15P!)IO_5A_AL8/DQ5R/DIFFIO_TX_R9P/DIFFOUT_R17P!)IO_5A_AL9/DQ5R/DIFFIO_TX_R8N/DIFFOUT_R15N!)IO_5A_AM8/DQ5R/DIFFIO_TX_R9N/DIFFOUT_R17N!51)IO_5A_AN10/DQ1R/DIFFIO_TX_R2P/DIFFOUT_R3P!)IO_5A_AN7/DQ4R/DIFFIO_TX_R7P/DIFFOUT_R13P!)IO_5A_AN9/DQ3R/DIFFIO_TX_R6P/DIFFOUT_R11P!)IO_5A_AP10/DQ1R/DIFFIO_TX_R2N/DIFFOUT_R3N!)IO_5A_AP7/DQ4R/DIFFIO_TX_R7N/DIFFOUT_R13N""!)IO_5A_AP8/DQ4R/DIFFIO_RX_R7P/DIFFOUT_R14P,,!)IO_5A_AP9/DQ3R/DIFFIO_TX_R6N/DIFFOUT_R11N66!)IO_5A_AR8/DQ4R/DIFFIO_RX_R7N/DIFFOUT_R14N@@!*IO_5A_AT10/DQS2R/DIFFIO_RX_R3P/DIFFOUT_R6PJJ!*IO_5A_AT6/DQS6R/DIFFIO_RX_R9P/DIFFOUT_R18PTT!*IO_5A_AT7/DQS5R/DIFFIO_RX_R8P/DIFFOUT_R16P^^!*IO_5A_AT8/DQS4R/DIFFIO_RX_R6P/DIFFOUT_R12Phh!*IO_5A_AT9/DQS3R/DIFFIO_RX_R5P/DIFFOUT_R10Prr!+IO_5A_AU10/DQSN2R/DIFFIO_RX_R3N/DIFFOUT_R6N||!+IO_5A_AU6/DQSN6R/DIFFIO_RX_R9N/DIFFOUT_R18N!+IO_5A_AU7/DQSN5R/DIFFIO_RX_R8N/DIFFOUT_R16N!+IO_5A_AU8/DQSN4R/DIFFIO_RX_R6N/DIFFOUT_R12N!+IO_5A_AU9/DQSN3R/DIFFIO_RX_R5N/DIFFOUT_R10N!)IO_5A_AV10/DQ2R/DIFFIO_RX_R4P/DIFFOUT_R8P!*IO_5A_AV5/DQ6R/DIFFIO_RX_R10P/DIFFOUT_R20P!)IO_5A_AV8/DQS1R/DIFFIO_RX_R2P/DIFFOUT_R4P!)IO_5A_AW10/DQ2R/DIFFIO_RX_R4N/DIFFOUT_R8N!*IO_5A_AW4/DQ6R/DIFFIO_RX_R10N/DIFFOUT_R20N!%IO_5A_AW5/DIFFIO_RX_R12N/DIFFOUT_R24N!%IO_5A_AW6/DIFFIO_RX_R12P/DIFFOUT_R24P!*IO_5A_AW8/DQSN1R/DIFFIO_RX_R2N/DIFFOUT_R4N!,IO_5C_AB10/DQ16R/DIFFIO_TX_R26N/DIFFOUT_R51NZZ!,IO_5C_AB11/DQ16R/DIFFIO_TX_R26P/DIFFOUT_R51Pdd!,IO_5C_AB12/DQ17R/DIFFIO_TX_R27N/DIFFOUT_R53Nnn!,IO_5C_AB13/DQ17R/DIFFIO_TX_R27P/DIFFOUT_R53Pxx!/IO_5C_AD10***/DQ15R/DIFFIO_TX_R24P/DIFFOUT_R47P!,IO_5C_AE10/DQ13R/DIFFIO_TX_R21N/DIFFOUT_R41N!,IO_5C_AE11/DQ13R/DIFFIO_TX_R21P/DIFFOUT_R41P!,IO_5C_AF10/DQ14R/DIFFIO_TX_R22N/DIFFOUT_R43N!,IO_5C_AF11/DQ14R/DIFFIO_TX_R22P/DIFFOUT_R43P!/IO_5C_AG10***/DQ14R/DIFFIO_TX_R23P/DIFFOUT_R45P!+IO_5C_AH8/DQ12R/DIFFIO_TX_R19N/DIFFOUT_R37N!51+IO_5C_AH9/DQ12R/DIFFIO_TX_R19P/DIFFOUT_R37P!,IO_5C_AK6/DQS15R/DIFFIO_RX_R23P/DIFFOUT_R46P!+IO_5C_AK7/DQ12R/DIFFIO_TX_R20N/DIFFOUT_R39N!+IO_5C_AK8/DQ12R/DIFFIO_TX_R20P/DIFFOUT_R39P!,IO_5C_AL6/DQS14R/DIFFIO_RX_R22P/DIFFOUT_R44P!/IO_5C_AM6***/DQS13R/DIFFIO_RX_R20P/DIFFOUT_R40P!.IO_5C_AN6***/DQ13R/DIFFIO_RX_R21P/DIFFOUT_R42P!,IO_5C_AP6/DQS12R/DIFFIO_RX_R19P/DIFFOUT_R38P!'0PEP4S100G5ES1F1517-7EP4S100G5ES1F1517-7.NormalEP4S100G5ES1F1517-7.Normal0(.nZ09\EP4S100G5ES1F1517 (For ES1 silicon only) VERSION : 1.0 PAGE : 7 of 14 DATE : JUNE 2009 .X dsNote : Pins with this symbol (***) can only be used as single-ended I/O. Please refer to pin-out file for details. A9IO_6A_H10/PLL_R1_FB_CLKOUT0P/DIFFIO_TX_R56P/DIFFOUT_R112P !6IO_6A_G10/PLL_R1_CLKOUT0N/DIFFIO_TX_R56N/DIFFOUT_R112N!8IO_6C_W12/PLL_R2_FB_CLKOUT0P/DIFFIO_TX_R29P/DIFFOUT_R58P!5IO_6C_W11/PLL_R2_CLKOUT0N/DIFFIO_TX_R29N/DIFFOUT_R58N((!"RUP6A/DIFFIO_RX_R56P/DIFFOUT_R111P<<!"RDN6A/DIFFIO_RX_R56N/DIFFOUT_R111NFF!51.IO_6A_C10/DQSN34R/DIFFIO_RX_R55N/DIFFOUT_R109NZZ!-IO_6A_C7/DQSN31R/DIFFIO_RX_R51N/DIFFOUT_R101Ndd!-IO_6A_C8/DQSN32R/DIFFIO_RX_R52N/DIFFOUT_R103Nnn!к+IO_6A_C9/DQ33R/DIFFIO_RX_R53N/DIFFOUT_R105Nxx!r-IO_6A_D10/DQS34R/DIFFIO_RX_R55P/DIFFOUT_R109P!,IO_6A_D7/DQS31R/DIFFIO_RX_R51P/DIFFOUT_R101P!,IO_6A_D8/DQS32R/DIFFIO_RX_R52P/DIFFOUT_R103P!+IO_6A_D9/DQ33R/DIFFIO_RX_R53P/DIFFOUT_R105P!+IO_6A_E10/DQ31R/DIFFIO_RX_R50N/DIFFOUT_R99N!,IO_6A_E7/DQSN28R/DIFFIO_RX_R46N/DIFFOUT_R91N!+IO_6A_F10/DQ31R/DIFFIO_RX_R50P/DIFFOUT_R99P!,IO_6A_F6/DQSN29R/DIFFIO_RX_R48N/DIFFOUT_R95N!+IO_6A_F7/DQS28R/DIFFIO_RX_R46P/DIFFOUT_R91P!$IO_6A_F8/DIFFIO_RX_R45N/DIFFOUT_R89N!,IO_6A_F9/DQSN30R/DIFFIO_RX_R49N/DIFFOUT_R97N!+IO_6A_G6/DQS29R/DIFFIO_RX_R48P/DIFFOUT_R95P!51*IO_6A_G7/DQ28R/DIFFIO_TX_R46N/DIFFOUT_R92N!$IO_6A_G8/DIFFIO_RX_R45P/DIFFOUT_R89P!+IO_6A_G9/DQS30R/DIFFIO_RX_R49P/DIFFOUT_R97P!*IO_6A_H7/DQ28R/DIFFIO_TX_R46P/DIFFOUT_R92P!,IO_6A_J10/DQ34R/DIFFIO_TX_R55N/DIFFOUT_R110N""!+IO_6A_J8/DQ32R/DIFFIO_TX_R52N/DIFFOUT_R104N,,!+IO_6A_J9/DQ32R/DIFFIO_TX_R51N/DIFFOUT_R102N66!,IO_6A_K10/DQ34R/DIFFIO_TX_R55P/DIFFOUT_R110P@@!+IO_6A_K8/DQ32R/DIFFIO_TX_R52P/DIFFOUT_R104PJJ!+IO_6A_K9/DQ32R/DIFFIO_TX_R51P/DIFFOUT_R102PTT!,IO_6A_L10/DQ31R/DIFFIO_TX_R50N/DIFFOUT_R100N^^!,IO_6A_L11/DQ33R/DIFFIO_TX_R53N/DIFFOUT_R106Nhh!,IO_6A_M10/DQ31R/DIFFIO_TX_R50P/DIFFOUT_R100Prr!,IO_6A_M11/DQ33R/DIFFIO_TX_R53P/DIFFOUT_R106P||!,IO_6A_M12/DQ34R/DIFFIO_TX_R54N/DIFFOUT_R108N!51+IO_6A_N10/DQ30R/DIFFIO_TX_R49N/DIFFOUT_R98N!+IO_6A_N11/DQ30R/DIFFIO_TX_R49P/DIFFOUT_R98P!,IO_6A_N12/DQ34R/DIFFIO_TX_R54P/DIFFOUT_R108P!+IO_6A_P13/DQ29R/DIFFIO_TX_R47N/DIFFOUT_R94N!+IO_6A_R11/DQ30R/DIFFIO_TX_R48N/DIFFOUT_R96N!+IO_6A_R12/DQ30R/DIFFIO_TX_R48P/DIFFOUT_R96P!+IO_6A_R13/DQ29R/DIFFIO_TX_R47P/DIFFOUT_R94P!+IO_6A_T12/DQ28R/DIFFIO_TX_R45N/DIFFOUT_R90N!+IO_6A_T13/DQ28R/DIFFIO_TX_R45P/DIFFOUT_R90P!.IO_6C_J6***/DQS23R/DIFFIO_RX_R38P/DIFFOUT_R75PZZ!*IO_6C_J7/DQ23R/DIFFIO_TX_R38N/DIFFOUT_R76Ndd!+IO_6C_K6/DQS22R/DIFFIO_RX_R37P/DIFFOUT_R73Pnn!*IO_6C_K7/DQ23R/DIFFIO_TX_R38P/DIFFOUT_R76Pxx!*IO_6C_L7/DQ23R/DIFFIO_TX_R37N/DIFFOUT_R74N!*IO_6C_L8/DQ23R/DIFFIO_TX_R37P/DIFFOUT_R74P!.IO_6C_M6***/DQS21R/DIFFIO_RX_R35P/DIFFOUT_R69P!*IO_6C_M7/DQ22R/DIFFIO_TX_R36N/DIFFOUT_R72N!*IO_6C_M8/DQ22R/DIFFIO_TX_R36P/DIFFOUT_R72P!*IO_6C_N7/DQ22R/DIFFIO_RX_R36N/DIFFOUT_R71N!*IO_6C_N8/DQ22R/DIFFIO_RX_R36P/DIFFOUT_R71P!*IO_6C_N9/DQ20R/DIFFIO_TX_R33P/DIFFOUT_R66P!*IO_6C_P8/DQ20R/DIFFIO_TX_R33N/DIFFOUT_R66N!+IO_6C_R10/DQ21R/DIFFIO_TX_R34N/DIFFOUT_R68N!+IO_6C_T10/DQ21R/DIFFIO_TX_R34P/DIFFOUT_R68P!+IO_6C_U10/DQ19R/DIFFIO_TX_R31P/DIFFOUT_R62P!.IO_6C_V10***/DQ19R/DIFFIO_TX_R32P/DIFFOUT_R64P!51+IO_6C_V11/DQ18R/DIFFIO_TX_R30N/DIFFOUT_R60N!+IO_6C_V12/DQ18R/DIFFIO_TX_R30P/DIFFOUT_R60P!'0PEP4S100G5ES1F1517-8EP4S100G5ES1F1517-8.NormalEP4S100G5ES1F1517-8.Normal0(X.nZ6\EP4S100G5ES1F1517 (For ES1 silicon only) VERSION : 1.0 PAGE : 8 of 14 DATE : JUNE 2009 X\&IO_7C_N19/PLL_T2_CLKOUT0N/DIFFOUT_T61N !&IO_7C_P19/PLL_T2_CLKOUT0P/DIFFOUT_T61P!8IO_7C_D20/PLL_T2_FBP/CLKOUT1/DIFFIO_RX_T31P/DIFFOUT_T62P!8IO_7C_C20/PLL_T2_FBN/CLKOUT2/DIFFIO_RX_T31N/DIFFOUT_T62N((!%IO_7C_L19/PLL_T2_CLKOUT3/DIFFOUT_T59P22!%IO_7C_M19/PLL_T2_CLKOUT4/DIFFOUT_T59N<<!&RDN7A/DIFFIO_RX_T1N/DIFFOUT_T2N/DQSN1TPP!%RUP7A/DIFFIO_RX_T1P/DIFFOUT_T2P/DQS1TZZ!IO_7A_A10/DQ5T/DIFFOUT_T13Pnn!+IO_7A_A11/DQSN5T/DIFFIO_RX_T7N/DIFFOUT_T14Nxx!)IO_7A_A13/DQ6T/DIFFIO_RX_T9N/DIFFOUT_T18N!%IO_7A_A14/DIFFIO_RX_T10N/DIFFOUT_T20N!51IO_7A_B10/DQ5T/DIFFOUT_T15N!*IO_7A_B11/DQS5T/DIFFIO_RX_T7P/DIFFOUT_T14P!)IO_7A_B13/DQ6T/DIFFIO_RX_T9P/DIFFOUT_T18P!%IO_7A_B14/DIFFIO_RX_T10P/DIFFOUT_T20P!IO_7A_C11/DQ5T/DIFFOUT_T13N!IO_7A_C12/DQ6T/DIFFOUT_T17P!IO_7A_C13/DQ6T/DIFFOUT_T17N!+IO_7A_C14/DQSN6T/DIFFIO_RX_T8N/DIFFOUT_T16N!IO_7A_D11/DQ5T/DIFFOUT_T15P!IO_7A_D13/DQ4T/DIFFOUT_T11N!51*IO_7A_D14/DQS6T/DIFFIO_RX_T8P/DIFFOUT_T16P!+IO_7A_E13/DQSN4T/DIFFIO_RX_T5N/DIFFOUT_T10N!)IO_7A_E14/DQ4T/DIFFIO_RX_T6N/DIFFOUT_T12N!IO_7A_F12/DQ4T/DIFFOUT_T11P!*IO_7A_F13/DQS4T/DIFFIO_RX_T5P/DIFFOUT_T10P""!)IO_7A_F14/DQ4T/DIFFIO_RX_T6P/DIFFOUT_T12P,,!*IO_7A_G13/DQSN3T/DIFFIO_RX_T4N/DIFFOUT_T8N66!IO_7A_G14/DQ3T/DIFFOUT_T9N@@!)IO_7A_H13/DQS3T/DIFFIO_RX_T4P/DIFFOUT_T8PJJ!IO_7A_H14/DQ3T/DIFFOUT_T9PTT!IO_7A_J12/DQ3T/DIFFOUT_T7P^^!IO_7A_J13/DQ3T/DIFFOUT_T7Nhh!IO_7A_J15/DIFFOUT_T19Nrr!IO_7A_K12/DQ2T/DIFFOUT_T5N||!*IO_7A_K13/DQSN2T/DIFFIO_RX_T2N/DIFFOUT_T4N!51(IO_7A_K14/DQ2T/DIFFIO_RX_T3N/DIFFOUT_T6N!IO_7A_K15/DIFFOUT_T19P!)IO_7A_L13/DQS2T/DIFFIO_RX_T2P/DIFFOUT_T4P!(IO_7A_L14/DQ2T/DIFFIO_RX_T3P/DIFFOUT_T6P!IO_7A_M13/DQ1T/DIFFOUT_T1N!IO_7A_M14/DQ2T/DIFFOUT_T5P!IO_7A_N13/DQ1T/DIFFOUT_T1P!IO_7A_N15/DQ1T/DIFFOUT_T3N!IO_7A_R14/DQ1T/DIFFOUT_T3P!IO_7B_A16/DQ10T/DIFFOUT_T29NX v !+IO_7B_B16/DQ10T/DIFFIO_RX_T15N/DIFFOUT_T30NXv!-IO_7B_C15/DQSN10T/DIFFIO_RX_T14N/DIFFOUT_T28NXv!+IO_7B_C16/DQ10T/DIFFIO_RX_T15P/DIFFOUT_T30PX(v(!,IO_7B_D15/DQS10T/DIFFIO_RX_T14P/DIFFOUT_T28PX2v2!IO_7B_D16/DQ10T/DIFFOUT_T29PX<v<!IO_7B_E16/DQ9T/DIFFOUT_T25PXFvF!IO_7B_F15/DQ9T/DIFFOUT_T27PXPvP!,IO_7B_F16/DQSN9T/DIFFIO_RX_T13N/DIFFOUT_T26NXZvZ!IO_7B_G15/DQ9T/DIFFOUT_T25NXdvd!+IO_7B_G16/DQS9T/DIFFIO_RX_T13P/DIFFOUT_T26PXnvn!IO_7B_G17/DQ9T/DIFFOUT_T27NXxvx!+IO_7B_H17/DQ12T/DIFFIO_RX_T18N/DIFFOUT_T36NXv!-IO_7B_J16/DQSN12T/DIFFIO_RX_T17N/DIFFOUT_T34NXv!+IO_7B_J17/DQ12T/DIFFIO_RX_T18P/DIFFOUT_T36PXv!,IO_7B_K16/DQS12T/DIFFIO_RX_T17P/DIFFOUT_T34PXv!IO_7B_K17/DQ12T/DIFFOUT_T35NXv!51IO_7B_L16/DQ12T/DIFFOUT_T35PXv!-IO_7B_M16/DQSN11T/DIFFIO_RX_T16N/DIFFOUT_T32NXv!IO_7B_M17/DQ11T/DIFFOUT_T33PXv!9,IO_7B_N16/DQS11T/DIFFIO_RX_T16P/DIFFOUT_T32PXv!51%IO_7B_N17/DQ11T/DIFFOUT_T33NXv!IO_7B_P16/DQ11T/DIFFOUT_T31NXv!IO_7B_P17/DQ11T/DIFFOUT_T31PXv!-IO_7C_A17/DQSN19T/DIFFIO_RX_T28N/DIFFOUT_T56NXv!%IO_7C_A18/DIFFIO_RX_T29N/DIFFOUT_T58NXv!,IO_7C_B17/DQS19T/DIFFIO_RX_T28P/DIFFOUT_T56PXv!%IO_7C_B19/DIFFIO_RX_T29P/DIFFOUT_T58PX"v"!IO_7C_C17/DQ17T/DIFFOUT_T49NX,v,!IO_7C_C18/DQ17T/DIFFOUT_T51NX6v6!%IO_7C_C19/DIFFIO_RX_T30N/DIFFOUT_T60NX@v@!-IO_7C_D17/DQSN17T/DIFFIO_RX_T25N/DIFFOUT_T50NXJvJ!IO_7C_D18/DQ17T/DIFFOUT_T51PXTvT!%IO_7C_D19/DIFFIO_RX_T30P/DIFFOUT_T60PX^v^!,IO_7C_E17/DQS17T/DIFFIO_RX_T25P/DIFFOUT_T50PXhvh!IO_7C_F17/DQ17T/DIFFOUT_T49PXrvr!-IO_7C_F18/DQSN18T/DIFFIO_RX_T26N/DIFFOUT_T52NX|v|!+IO_7C_F19/DQ18T/DIFFIO_RX_T27N/DIFFOUT_T54NXv!IO_7C_F20/DQ18T/DIFFOUT_T53PXv!,IO_7C_G18/DQS18T/DIFFIO_RX_T26P/DIFFOUT_T52PXv!+IO_7C_G19/DQ18T/DIFFIO_RX_T27P/DIFFOUT_T54PXv!IO_7C_G20/DQ18T/DIFFOUT_T53NXv!IO_7C_H19/DQ19T/DIFFOUT_T57NXv!IO_7C_J18/DQ19T/DIFFOUT_T55PXv!IO_7C_P18/DQ19T/DIFFOUT_T57PXv!IO_7C_R18/DQ19T/DIFFOUT_T55NXv!'09PEP4S100G5ES1F1517-9EP4S100G5ES1F1517-9.NormalEP4S100G5ES1F1517-9.Normal0(.nn\EP4S100G5ES1F1517 (For ES1 silicon only) VERSION : 1.0 PAGE : 9 of 14 DATE : JUNE 2009 \&IO_8C_M20/PLL_T1_CLKOUT0P/DIFFOUT_T68P !&IO_8C_L20/PLL_T1_CLKOUT0N/DIFFOUT_T68N!8IO_8C_G21/PLL_T1_FBP/CLKOUT1/DIFFIO_RX_T34P/DIFFOUT_T67P!8IO_8C_F21/PLL_T1_FBN/CLKOUT2/DIFFIO_RX_T34N/DIFFOUT_T67N((!%IO_8C_N20/PLL_T1_CLKOUT3/DIFFOUT_T70P22!%IO_8C_P20/PLL_T1_CLKOUT4/DIFFOUT_T70N<<!)RUP8A/DIFFIO_RX_T64P/DIFFOUT_T127P/DQS38TPP!*RDN8A/DIFFIO_RX_T64N/DIFFOUT_T127N/DQSN38TZZ!(RUP8C/DIFFIO_RX_T40P/DIFFOUT_T79P/DQS22Tdd!)RDN8C/DIFFIO_RX_T40N/DIFFOUT_T79N/DQSN22Tnn!,IO_8A_A27/DQ33T/DIFFIO_RX_T56N/DIFFOUT_T111N!,IO_8A_A28/DQ33T/DIFFIO_RX_T56P/DIFFOUT_T111P!51.IO_8A_A29/DQSN34T/DIFFIO_RX_T58N/DIFFOUT_T115N!IO_8A_A31/DQ34T/DIFFOUT_T114N!.IO_8A_B28/DQSN33T/DIFFIO_RX_T57N/DIFFOUT_T113N!-IO_8A_B29/DQS34T/DIFFIO_RX_T58P/DIFFOUT_T115P!IO_8A_B31/DQ34T/DIFFOUT_T114P!IO_8A_C27/DQ33T/DIFFOUT_T112P!-IO_8A_C28/DQS33T/DIFFIO_RX_T57P/DIFFOUT_T113P!IO_8A_C29/DQ34T/DIFFOUT_T116P!IO_8A_C30/DQ34T/DIFFOUT_T116N!IO_8A_D27/DQ33T/DIFFOUT_T112N!51IO_8A_D28/DQ35T/DIFFOUT_T118P!.IO_8A_D29/DQSN35T/DIFFIO_RX_T60N/DIFFOUT_T119N!,IO_8A_E28/DQ35T/DIFFIO_RX_T59N/DIFFOUT_T117N!-IO_8A_E29/DQS35T/DIFFIO_RX_T60P/DIFFOUT_T119P!&IO_8A_F26/DIFFIO_RX_T55N/DIFFOUT_T109N""!IO_8A_F27/DQ35T/DIFFOUT_T118N,,!,IO_8A_F28/DQ35T/DIFFIO_RX_T59P/DIFFOUT_T117P66!&IO_8A_G26/DIFFIO_RX_T55P/DIFFOUT_T109P@@!IO_8A_G27/DQ36T/DIFFOUT_T120PJJ!.IO_8A_G28/DQSN36T/DIFFIO_RX_T61N/DIFFOUT_T121NTT!IO_8A_G29/DQ36T/DIFFOUT_T122N^^!IO_8A_H26/DQ36T/DIFFOUT_T120Nhh!-IO_8A_H28/DQS36T/DIFFIO_RX_T61P/DIFFOUT_T121Prr!IO_8A_J26/DQ36T/DIFFOUT_T122P||!.IO_8A_J27/DQSN37T/DIFFIO_RX_T63N/DIFFOUT_T125N!51,IO_8A_K26/DQ37T/DIFFIO_RX_T62N/DIFFOUT_T123N!-IO_8A_K27/DQS37T/DIFFIO_RX_T63P/DIFFOUT_T125P!IO_8A_K28/DQ37T/DIFFOUT_T124N!IO_8A_L25/DQ37T/DIFFOUT_T124P!,IO_8A_L26/DQ37T/DIFFIO_RX_T62P/DIFFOUT_T123P!IO_8A_M25/DQ38T/DIFFOUT_T126P!IO_8A_M27/DQ38T/DIFFOUT_T128N!IO_8A_N25/DQ38T/DIFFOUT_T126N!IO_8A_P24/DIFFOUT_T110P!IO_8A_P25/DQ38T/DIFFOUT_T128P!IO_8A_R24/DIFFOUT_T110N!IO_8B_A26/DQ30T/DIFFOUT_T104P  !IO_8B_B25/DQ30T/DIFFOUT_T102N!.IO_8B_B26/DQSN30T/DIFFIO_RX_T52N/DIFFOUT_T103N!51zIO_8B_C25/DQ30T/DIFFOUT_T102P((!-IO_8B_C26/DQS30T/DIFFIO_RX_T52P/DIFFOUT_T103P22!IO_8B_D25/DQ29T/DIFFOUT_T100N<<!IO_8B_D26/DQ30T/DIFFOUT_T104NFF!.IO_8B_E25/DQSN29T/DIFFIO_RX_T51N/DIFFOUT_T101NPP!+IO_8B_F24/DQ29T/DIFFIO_RX_T50N/DIFFOUT_T99NZZ!-IO_8B_F25/DQS29T/DIFFIO_RX_T51P/DIFFOUT_T101Pdd!+IO_8B_G24/DQ29T/DIFFIO_RX_T50P/DIFFOUT_T99Pnn!IO_8B_G25/DQ29T/DIFFOUT_T100Pxx!+IO_8B_J24/DQ27T/DIFFIO_RX_T47N/DIFFOUT_T93N!IO_8B_J25/DQ27T/DIFFOUT_T94N!-IO_8B_K23/DQSN27T/DIFFIO_RX_T48N/DIFFOUT_T95N!51+IO_8B_K24/DQ27T/DIFFIO_RX_T47P/DIFFOUT_T93P!,IO_8B_L23/DQS27T/DIFFIO_RX_T48P/DIFFOUT_T95P!51{IO_8B_M23/DQ28T/DIFFOUT_T96N!IO_8B_M24/DQ27T/DIFFOUT_T94P!IO_8B_N22/DQ28T/DIFFOUT_T96P!-IO_8B_N23/DQSN28T/DIFFIO_RX_T49N/DIFFOUT_T97N!IO_8B_P22/DQ28T/DIFFOUT_T98N!,IO_8B_P23/DQS28T/DIFFIO_RX_T49P/DIFFOUT_T97P!IO_8B_R22/DQ28T/DIFFOUT_T98P!%IO_8C_A24/DIFFIO_RX_T36N/DIFFOUT_T71N!%IO_8C_A25/DIFFIO_RX_T36P/DIFFOUT_T71P!%IO_8C_C22/DIFFIO_RX_T35N/DIFFOUT_T69N!-IO_8C_C24/DQSN20T/DIFFIO_RX_T37N/DIFFOUT_T73N""!%IO_8C_D21/DIFFIO_RX_T35P/DIFFOUT_T69P,,!IO_8C_D22/DQ22T/DIFFOUT_T78N66!,IO_8C_D24/DQS20T/DIFFIO_RX_T37P/DIFFOUT_T73P@@!IO_8C_E22/DQ22T/DIFFOUT_T78PJJ!IO_8C_F23/DQ22T/DIFFOUT_T80NTT!IO_8C_G22/DQ21T/DIFFOUT_T76P^^!IO_8C_G23/DQ22T/DIFFOUT_T80Phh!+IO_8C_H22/DQ21T/DIFFIO_RX_T38N/DIFFOUT_T75Nrr!-IO_8C_H23/DQSN21T/DIFFIO_RX_T39N/DIFFOUT_T77N||!+IO_8C_J22/DQ21T/DIFFIO_RX_T38P/DIFFOUT_T75P!,IO_8C_J23/DQS21T/DIFFIO_RX_T39P/DIFFOUT_T77P!IO_8C_K22/DQ21T/DIFFOUT_T76N!IO_8C_M21/DQ20T/DIFFOUT_T72P!IO_8C_M22/DQ20T/DIFFOUT_T74N!IO_8C_N21/DQ20T/DIFFOUT_T74P!IO_8C_R20/DQ20T/DIFFOUT_T72N!'0PEP4S100G5ES1F1517-10EP4S100G5ES1F1517-10.NormalEP4S100G5ES1F1517-10.Normal0(.n`|]EP4S100G5ES1F1517 (For ES1 silicon only) VERSION : 1.0 PAGE : 10 of 14 DATE : JUNE 2009 .^|NNote : Pins with this symbol (*) can be used as clock pins when the transceiver blocks operate at or below 6.375Gbps speed. Quartus II limits use of these clocks when same side transceivers operate above 8.5Gbps speed. Please refer pin-out file for details. , VREFB1AN0 ! VREFB1CN0! VREFB2AN0! VREFB2CN0((! VREFB3AN022! VREFB3BN0<<! VREFB3CN0FF!51 VREFB4AN0PP! VREFB4BN0ZZ! VREFB4CN0dd! VREFB5AN0nn! VREFB5CN0xx! VREFB6AN0! VREFB6CN0!51 VREFB7AN0! VREFB7BN0! VREFB7CN0! VREFB8AN0! VREFB8BN0! VREFB8CN0!CLK1N  !CLK1P!CLK3P!51CLK3N((!!CLK4N_DIFFIO_RX_B32N_DIFFOUT_B64N22!!CLK4P_DIFFIO_RX_B32P_DIFFOUT_B64P<<!CLK5N_DIFFOUT_B63NFF!CLK5P_DIFFOUT_B63PPP!!CLK6P_DIFFIO_RX_B33P_DIFFOUT_B65PZZ!!CLK6N_DIFFIO_RX_B33N_DIFFOUT_B65Ndd!CLK7P_DIFFOUT_B66Pnn!CLK7N_DIFFOUT_B66Nxx!CLK8N!CLK8P!CLK10P!CLK10N!"CLK12N_DIFFIO_RX_T32N_DIFFOUT_T64N!"CLK12P_DIFFIO_RX_T32P_DIFFOUT_T64P!51CLK13N_DIFFOUT_T63N!CLK13P_DIFFOUT_T63P!"CLK14P_DIFFIO_RX_T33P_DIFFOUT_T65P!"CLK14N_DIFFIO_RX_T33N_DIFFOUT_T65N!CLK15P_DIFFOUT_T66P!CLK15N_DIFFOUT_T66N!'0PEP4S100G5ES1F1517-11EP4S100G5ES1F1517-11.NormalEP4S100G5ES1F1517-11.Normal0(.n$h]EP4S100G5ES1F1517 (For ES1 silicon only) VERSION : 1.0 PAGE : 11 of 14 DATE : JUNE 2009 ."Jh0lsNote : Pins with this symbol (**) can only be used in configuration mode. These pins can not be used as user I/O pins after configuration but only the RUP /RDN feature still available for package 1932. Please refer pin-out file for details. 1IO_1C_W30/DQ16L/DIFFIO_TX_L25N/DIFFOUT_L49N/DATA0 !1IO_1C_W29/DQ16L/DIFFIO_TX_L25P/DIFFOUT_L49P/DATA1!5IO_1C_N35**/DQSN16L/DIFFIO_RX_L25N/DIFFOUT_L50N/DATA2!2IO_1C_P34/DQS16L/DIFFIO_RX_L25P/DIFFOUT_L50P/DATA3((!1IO_1C_V27/DQ16L/DIFFIO_TX_L26N/DIFFOUT_L51N/DATA422!1IO_1C_W26/DQ16L/DIFFIO_TX_L26P/DIFFOUT_L51P/DATA5<<!5IO_1C_R35**/DQSN17L/DIFFIO_RX_L26N/DIFFOUT_L52N/DATA6FF!514IO_1C_R34**/DQS17L/DIFFIO_RX_L26P/DIFFOUT_L52P/DATA7PP!4IO_1C_R31**/DQ15L/DIFFIO_TX_L24N/DIFFOUT_L47N/CLKUSRdd!5IO_1C_V29/DQ17L/DIFFIO_TX_L27P/DIFFOUT_L53P/CRC_ERRORnn!4IO_1C_U35**/DQ17L/DIFFIO_RX_L27N/DIFFOUT_L54N/DEV_OExx!6IO_1C_V34**/DQ17L/DIFFIO_RX_L27P/DIFFOUT_L54P/DEV_CLRN!5IO_1C_V30/DQ17L/DIFFIO_TX_L27N/DIFFOUT_L53N/INIT_DONE!51ASDO  ! CONF_DONE!DCLK!MSEL0((!MSEL122!MSEL2<<!NCEFF!NCEOPP!NCONFIGZZ!51NCSOdd! NIO_PULLUPnn!NSTATUSxx!PORSEL!TCK!TDI!TDO!TMS!TRST!'0PEP4S100G5ES1F1517-12EP4S100G5ES1F1517-12.NormalEP4S100G5ES1F1517-12.Normal0(b.bn]EP4S100G5ES1F1517 (For ES1 silicon only) VERSION : 1.0 PAGE : 12 of 14 DATE : JUNE 2009 bbNC_AB31 !NC_AB9!NC_AC31!NC_AC32((!NC_AC822!NC_AD17<<!NC_AD31FF!51NC_AD9PP!NC_AE31ZZ!NC_AE35dd!NC_AE5nn!NC_AF34xx!NC_AF6!NC_AG31!51NC_AG32!NC_AG34!NC_AG35!NC_AG5!NC_AG6!NC_AG7!NC_AG8!NC_AG9!NC_AH34!NC_AH35!51NC_AH5!NC_AH6!NC_AJ34!NC_AJ35!NC_AJ5""!NC_AJ6,,!NC_AK1166!NC_AK35@@!NC_AK5JJ!NC_AL35TT!NC_AL5^^!NC_AM28hh!NC_AM35rr!NC_AM5||!NC_AN35!51NC_AN5!NC_AP35!NC_AP5!NC_AR35!NC_AR5!NC_AT5!NC_AU35!NC_AU5!NC_AV36!NC_AV4!NC_C35!NC_C5!NC_D35!NC_D5!wNC_F11!NC_F35&&!NC_F500!NC_G35::!NC_G5DD!NC_H35 !NC_J34!NC_J35!NC_J5((!NC_K3422!NC_K35<<!NC_K5FF!NC_L28PP!51NC_L35ZZ!NC_L5dd!NC_N5nn!NC_N6xx!NC_P6!NC_R16!NC_R26!NC_R32!NC_R33!NC_R5!51NC_R6!NC_R7!NC_R8!51qNC_R9!NC_T31!NC_T9!NC_U31!NC_U5!NC_V31!NC_V6!NC_V9""!NC_W32,,!NC_W3366!NC_W34@@!NC_W35JJ!NC_W5TT!NC_W6^^!NC_W7hh!NC_W8rr!DNU! TEMPDIODEN! TEMPDIODEP!'0PPEP4S100G5ES1F1517-13EP4S100G5ES1F1517-13.NormalEP4S100G5ES1F1517-13.Normal0(d.n<00]EP4S100G5ES1F1517 (For ES1 silicon only) VERSION : 1.0 PAGE : 13 of 14 DATE : JUNE 2009 dZGND !GND!GND!GND((!GND22!GND<<!GNDFF!51GNDPP!GNDZZ!GNDdd!GNDnn!GNDxx!GND!GND!51GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!51GND!GND!GND!GND!GND""!GND,,!GND66!GND@@!GNDJJ!GNDTT!GND^^!GNDhh!GNDrr!GND||!GND!51GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND&&!GND00!GND::!GNDDD!GNDNN!GNDXX!GNDbb!GNDll!GNDvv!GND!GND!GND!51GND!GND!GND!GND!GND!GND!GND!GND!GND!5GND!GND!GND  !GND!GND  !GND**!GND44!GND>>!GNDHH!GNDRR!GND\\!GNDff!GNDpp!GNDzz!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!>GND$$!51DGND..!GND88!VGNDBB!GNDLL!GNDVV!SGND``!GNDjj!GNDtt!GND~~!GND!GND!GND!GND!GND!GND!GND!GND!GND!51GND!GND!GND!GND!GND  !GND!GND!GND((!51GND22!GND<<!GNDFF!GNDPP!GNDZZ!GNDdd!GNDnn!GNDxx!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND""!GND,,!GND66!GND@@!GNDJJ!GNDTT!GND^^!GNDhh!GNDrr!GND||!GND!51hGND!GND!GND!GND!51|GND!GND!GND!GNDd !GNDd!GNDd!GNDd((!GNDd22!GNDd<<!GNDdFF!GNDdPP!GNDdZZ!51GNDddd!GNDdnn!GNDdxx!GNDd!GNDd!51GNDd!GNDd!GNDd!GNDd!GNDd!51GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd""!GNDd,,!GNDd66!GNDd@@!GNDdJJ!GNDdTT!GNDd^^!GNDdhh!GNDdrr!GNDd||!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!1GNDd!51GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd&&!GNDd00!GNDd::!GNDdDD!GNDdNN!GNDdXX!GNDdbb!GNDdll!GNDdvv!GNDd!GNDd!51GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd  !GNDd!GNDd  !GNDd**!GNDd44!GNDd>>!GNDdHH!51GNDdRR!GNDd\\!GNDdff!GNDdpp!GNDdzz!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd$$!GNDd..!GNDd88!GNDdBB!GNDdLL!GNDdVV!GNDd``!GNDdjj!GNDdtt!GNDd~~!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd  !GNDd!GNDd!GNDd((!GNDd22!GNDd<<!GNDdFF!GNDdPP!GNDdZZ!GNDddd!GNDdnn!GNDdxx!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd""!GNDd,,!GNDd66!GNDd@@!GNDdJJ!GNDdTT!GNDd^^!GNDdhh!GNDdrr!GNDd||!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!'0PEP4S100G5ES1F1517-14EP4S100G5ES1F1517-14.NormalEP4S100G5ES1F1517-14.Normal0(,.nD8]EP4S100G5ES1F1517 (For ES1 silicon only) VERSION : 1.0 PAGE : 14 of 14 DATE : JUNE 2009 , GXB_RX_L0N ! GXB_RX_L0P! GXB_RX_L10N! GXB_RX_L10P((! GXB_RX_L11N22! GXB_RX_L11P<<! GXB_RX_L1NFF!51 GXB_RX_L1PPP! GXB_RX_L2NZZ! GXB_RX_L2Pdd! GXB_RX_L3Nnn! GXB_RX_L3Pxx! GXB_RX_L4N! GXB_RX_L4P!51 GXB_RX_L5N! GXB_RX_L5P! GXB_RX_L6N! GXB_RX_L6P! GXB_RX_L7N! GXB_RX_L7P! GXB_RX_L8N!t GXB_RX_L8P! GXB_RX_L9N!r GXB_RX_L9P! GXB_RX_R0N! GXB_RX_R0P!51 GXB_RX_R10N! GXB_RX_R10P! GXB_RX_R11N""! GXB_RX_R11P,,! GXB_RX_R1N66! GXB_RX_R1P@@! GXB_RX_R2NJJ! GXB_RX_R2PTT! GXB_RX_R3N^^! GXB_RX_R3Phh! GXB_RX_R4Nrr! GXB_RX_R4P||! GXB_RX_R5N! GXB_RX_R5P! GXB_RX_R6N! GXB_RX_R6P! GXB_RX_R7N!51 GXB_RX_R7P! GXB_RX_R8N! GXB_RX_R8P! GXB_RX_R9N! GXB_RX_R9P! GXB_TX_L0N! GXB_TX_L0P! GXB_TX_L10N! GXB_TX_L10P! GXB_TX_L11N! GXB_TX_L11P&&! GXB_TX_L1N00! GXB_TX_L1P::! GXB_TX_L2NDD! GXB_TX_L2PNN!y GXB_TX_L3NXX! GXB_TX_L3Pbb! GXB_TX_L4Nll! GXB_TX_L4Pvv! GXB_TX_L5N! GXB_TX_L5P! GXB_TX_L6N!51 GXB_TX_L6P! GXB_TX_L7N! GXB_TX_L7P! GXB_TX_L8N! GXB_TX_L8P! GXB_TX_L9N! GXB_TX_L9P! GXB_TX_R0N! GXB_TX_R0P! GXB_TX_R10N!51 GXB_TX_R10P! GXB_TX_R11N  ! GXB_TX_R11P! GXB_TX_R1N  ! GXB_TX_R1P**! GXB_TX_R2N44! GXB_TX_R2P>>! GXB_TX_R3NHH! GXB_TX_R3PRR! GXB_TX_R4N\\! GXB_TX_R4Pff! GXB_TX_R5Npp! GXB_TX_R5Pzz! GXB_TX_R6N! GXB_TX_R6P! GXB_TX_R7N! GXB_TX_R7P! GXB_TX_R8N! GXB_TX_R8P! GXB_TX_R9N! GXB_TX_R9P! GXB_CMUTX_L0N, J ! GXB_CMUTX_L0P,J! GXB_CMUTX_L1N,J! GXB_CMUTX_L1P,(J(! GXB_CMUTX_L2N,2J2! GXB_CMUTX_L2P,<J<! GXB_CMUTX_L3N,FJF! GXB_CMUTX_L3P,PJP! GXB_CMUTX_L4N,ZJZ! GXB_CMUTX_L4P,dJd! GXB_CMUTX_L5N,nJn! GXB_CMUTX_L5P,xJx! GXB_CMUTX_R0N,J! GXB_CMUTX_R0P,J! GXB_CMUTX_R1N,J! GXB_CMUTX_R1P,J! GXB_CMUTX_R2N,J! GXB_CMUTX_R2P,J! GXB_CMUTX_R3N,J! GXB_CMUTX_R3P,J! GXB_CMUTX_R4N,J! GXB_CMUTX_R4P,J! GXB_CMUTX_R5N,J! GXB_CMUTX_R5P,J!REFCLK_L0N,GXB_CMURX_L0N,J!REFCLK_L0P,GXB_CMURX_L0P,J!REFCLK_L1N,GXB_CMURX_L1N,J!REFCLK_L1P,GXB_CMURX_L1P,"J"!REFCLK_L2N,GXB_CMURX_L2N,,J,!REFCLK_L2P,GXB_CMURX_L2P,6J6!REFCLK_L3N,GXB_CMURX_L3N,@J@!REFCLK_L3P,GXB_CMURX_L3P,JJJ!REFCLK_L4N,GXB_CMURX_L4N,TJT!REFCLK_L4P,GXB_CMURX_L4P,^J^!REFCLK_L5N,GXB_CMURX_L5N,hJh!REFCLK_L5P,GXB_CMURX_L5P,rJr!REFCLK_R0N,GXB_CMURX_R0N,J!REFCLK_R0P,GXB_CMURX_R0P,J!REFCLK_R1N,GXB_CMURX_R1N,J!REFCLK_R1P,GXB_CMURX_R1P,J!REFCLK_R2N,GXB_CMURX_R2N,J!REFCLK_R2P,GXB_CMURX_R2P,J!6REFCLK_R3N,GXB_CMURX_R3N,J!51,REFCLK_R3P,GXB_CMURX_R3P,J!REFCLK_R4N,GXB_CMURX_R4N,J!REFCLK_R4P,GXB_CMURX_R4P,J!51REFCLK_R5N,GXB_CMURX_R5N,J!REFCLK_R5P,GXB_CMURX_R5P,J!RREF_L0,J!RREF_L1,J!RREF_R0,J!RREF_R1,&J&!'0PEP4S100G5ES1F1517-1EP4S100G5ES1F1517-1.NormalEP4S100G5ES1F1517-1.Normal0(".nphd\EP4S100G5ES1F1517 (For ES1 silicon only) VERSION : 1.0 PAGE : 1 of 14 DATE : JUNE 2009 "VCC !VCC!VCC!VCC((!VCC22!VCC<<!VCCFF!51VCCPP!51VCCZZ!VCCdd!VCCnn!VCCxx!VCC!VCC!51VCC!VCC!VCC!VCC!VCC!VCC!VCC!VCC!VCC!VCC!51VCC!VCC!VCC!VCC!VCC""!VCC,,!VCC66!VCC@@!VCCJJ!VCCTT!VCC^^!VCChh!VCCrr!VCC||!VCC!51VCC!VCC!VCC!VCC!VCC!VCC!VCC!VCC!VCC!VCC!VCC!VCC!VCC!VCC!VCC!VCC&&!VCC00!VCC::!VCCDD!VCCNN!VCCXX!VCCbb!VCCll!VCCPT!VCCPT!VCCPT!VCCPT!VCCPT!VCCPT!VCCPGM!VCCPGM! VCC_CLKIN3C! VCC_CLKIN4C! VCC_CLKIN7C!51 VCC_CLKIN8C!VCCBAT! VCCA_PLL_B1**! VCCA_PLL_B244! VCCA_PLL_L2>>! VCCA_PLL_L3HH! VCCA_PLL_R2RR! VCCA_PLL_R3\\! VCCA_PLL_T1ff! VCCA_PLL_T2pp! VCCD_PLL_B1! VCCD_PLL_B2!51 VCCD_PLL_L2! VCCD_PLL_L3! VCCD_PLL_R2! VCCD_PLL_R3! VCCD_PLL_T1! VCCD_PLL_T2!VCCAUX!VCCAUX!VCCAUX!VCCAUX!VCCA_L!VCCA_L!VCCA_R$$!VCCA_R..! VCCH_GXBL0BB! VCCH_GXBL1LL! VCCH_GXBL2VV! VCCH_GXBR0``! VCCH_GXBR1jj! VCCH_GXBR2tt! VCCL_GXBL0! VCCL_GXBL0! VCCL_GXBL1! VCCL_GXBL1! VCCL_GXBL2!3 VCCL_GXBL2! VCCL_GXBR0! VCCL_GXBR0! VCCL_GXBR1! VCCL_GXBR1! VCCL_GXBR2! VCCL_GXBR2!VCCR_R"t@t!VCCR_R"j@j!VCCR_R"`@`!VCCR_L"V@V!VCCR_L"L@L!VCCR_L"B@B!VCCT_R".@.!VCCT_R"$@$!VCCT_R"@!VCCT_L"@!VCCT_L"@!VCCT_L"@!VCCHIP_R"@!VCCHIP_R"@!VCCHIP_R"@!VCCHIP_L"@!VCCHIP_L"@!VCCHIP_L"@!VCCIO1A" @ !VCCIO1A"@!VCCIO1A"@!VCCIO1A"(@(!VCCIO1A"2@2!VCCIO1C"<@<!VCCIO1C"F@F!VCCIO1C"P@P!VCCIO1C"Z@Z!VCCIO2A"d@d!VCCIO2A"n@n!VCCIO2A"x@x!51VCCIO2A"@!VCCIO2A"@!VCCIO2C"@!VCCIO2C"@!VCCIO2C"@!VCCIO2C"@!VCCIO3A"@!VCCIO3A"@!VCCIO3A"@!VCCIO3A"@!VCCIO3B"@!VCCIO3B"@!VCCIO3C"@!VCCIO3C"@!VCCIO3C"@!VCCIO4A"@!VCCIO4A""@"!VCCIO4A",@,!VCCIO4A"6@6!VCCIO4B"@@@!VCCIO4B"J@J!VCCIO4C"T@T!VCCIO4C"^@^!VCCIO4C"h@h!VCCIO5A"r@r!VCCIO5A"|@|!VCCIO5A"@!VCCIO5A"@!ȼVCCIO5A"@!VCCIO5C"@!VCCIO5C"@!VCCIO5C"@!VCCIO5C"@!VCCIO6A"@!VCCIO6A"@!VCCIO6A"@!VCCIO6A"@!VCCIO6A"@!VCCIO6C"@!VCCIO6C"@!VCCIO6C"@!VCCIO6C"@!VCCIO7A"&@&!VCCIO7A"0@0!VCCIO7A":@:!VCCIO7A"D@D!VCCIO7B"N@N!VCCIO7B"X@X!VCCIO7C"b@b!VCCIO7C"l@l!VCCIO7C"v@v!VCCIO8A"@!VCCIO8A"@!VCCIO8A"@!VCCIO8A"@!VCCIO8B"@!VCCIO8B"@!VCCIO8C"@!VCCIO8C"@!VCCIO8C"@!VCCPD1A"@!51VCCPD1C"@!VCCPD2A"@!VCCPD2C"@!VCCPD3A" @ !VCCPD3B"@!VCCPD3C" @ !VCCPD4A"*@*!VCCPD4B"4@4!VCCPD4C">@>!VCCPD5A"H@H!VCCPD5C"R@R!VCCPD6A"\@\!VCCPD6C"f@f!VCCPD7A"p@p!˼VCCPD7B"z@z!VCCPD7C"@!VCCPD8A"@!VCCPD8B"@!VCCPD8C"@!'0PEP4S100G5ES1F1517-2EP4S100G5ES1F1517-2.NormalEP4S100G5ES1F1517-2.Normal0(.n<0\EP4S100G5ES1F1517 (For ES1 silicon only) VERSION : 1.0 PAGE : 2 of 14 DATE : JUNE 2009 .: FsNote : Pins with this symbol (***) can only be used as single-ended I/O. Please refer to pin-out file for details. 83IO_1A_K29/PLL_L1_CLKOUT0N/DIFFIO_TX_L1N/DIFFOUT_L1N !6IO_1A_L29/PLL_L1_FB_CLKOUT0P/DIFFIO_TX_L1P/DIFFOUT_L1P!RDN1A/DIFFIO_RX_L1N/DIFFOUT_L2N((!RUP1A/DIFFIO_RX_L1P/DIFFOUT_L2P22!(IO_1A_B32/DQ2L/DIFFIO_RX_L4N/DIFFOUT_L8NFF!51*IO_1A_C31/DQSN1L/DIFFIO_RX_L2N/DIFFOUT_L4NPP!(IO_1A_C32/DQ2L/DIFFIO_RX_L4P/DIFFOUT_L8PZZ!+IO_1A_C33/DQSN3L/DIFFIO_RX_L5N/DIFFOUT_L10Ndd!)IO_1A_D31/DQS1L/DIFFIO_RX_L2P/DIFFOUT_L4Pnn!*IO_1A_D33/DQS3L/DIFFIO_RX_L5P/DIFFOUT_L10Pxx!ȼ)IO_1A_E31/DQ4L/DIFFIO_RX_L7N/DIFFOUT_L14N!+IO_1A_E32/DQSN5L/DIFFIO_RX_L8N/DIFFOUT_L16N!51+IO_1A_E34/DQSN6L/DIFFIO_RX_L9N/DIFFOUT_L18N!)IO_1A_F31/DQ4L/DIFFIO_RX_L7P/DIFFOUT_L14P!*IO_1A_F32/DQS5L/DIFFIO_RX_L8P/DIFFOUT_L16P!,IO_1A_F33/DQSN7L/DIFFIO_RX_L11N/DIFFOUT_L22N!m*IO_1A_F34/DQS6L/DIFFIO_RX_L9P/DIFFOUT_L18P!+IO_1A_G31/DQSN4L/DIFFIO_RX_L6N/DIFFOUT_L12N!+IO_1A_G33/DQS7L/DIFFIO_RX_L11P/DIFFOUT_L22P!*IO_1A_H31/DQS4L/DIFFIO_RX_L6P/DIFFOUT_L12P!(IO_1A_H32/DQ2L/DIFFIO_TX_L4N/DIFFOUT_L7N!c%IO_1A_H34/DIFFIO_RX_L12P/DIFFOUT_L24P!(IO_1A_J30/DQ1L/DIFFIO_TX_L2N/DIFFOUT_L3N!(IO_1A_J32/DQ2L/DIFFIO_TX_L4P/DIFFOUT_L7P!|*IO_1A_J33/DQ7L/DIFFIO_TX_L11N/DIFFOUT_L21N!(IO_1A_K30/DQ1L/DIFFIO_TX_L2P/DIFFOUT_L3P!)IO_1A_K31/DQ5L/DIFFIO_TX_L8N/DIFFOUT_L15N""!*IO_1A_K32/DQ7L/DIFFIO_TX_L11P/DIFFOUT_L21P,,!)IO_1A_L31/DQ5L/DIFFIO_TX_L8P/DIFFOUT_L15P66!(IO_1A_M28/DQ1L/DIFFIO_TX_L3N/DIFFOUT_L5N@@!)IO_1A_M29/DQ4L/DIFFIO_TX_L7N/DIFFOUT_L13NJJ!)IO_1A_M30/DQ3L/DIFFIO_TX_L6N/DIFFOUT_L11NTT!(IO_1A_M31/DQ3L/DIFFIO_TX_L5N/DIFFOUT_L9N^^!(IO_1A_N28/DQ1L/DIFFIO_TX_L3P/DIFFOUT_L5Phh!)IO_1A_N29/DQ4L/DIFFIO_TX_L7P/DIFFOUT_L13Prr!)IO_1A_N30/DQ3L/DIFFIO_TX_L6P/DIFFOUT_L11P||!(IO_1A_N31/DQ3L/DIFFIO_TX_L5P/DIFFOUT_L9P!51*IO_1A_P29/DQ7L/DIFFIO_TX_L12N/DIFFOUT_L23N!*IO_1A_R27/DQ6L/DIFFIO_TX_L10N/DIFFOUT_L19N!)IO_1A_R28/DQ5L/DIFFIO_TX_L9N/DIFFOUT_L17N!*IO_1A_R29/DQ7L/DIFFIO_TX_L12P/DIFFOUT_L23P!*IO_1A_T27/DQ6L/DIFFIO_TX_L10P/DIFFOUT_L19P!)IO_1A_T28/DQ5L/DIFFIO_TX_L9P/DIFFOUT_L17P!+IO_1C_L32/DQ12L/DIFFIO_TX_L19N/DIFFOUT_L37NF0F!,IO_1C_L34/DQS15L/DIFFIO_RX_L23P/DIFFOUT_L46PP0P!+IO_1C_M32/DQ12L/DIFFIO_TX_L19P/DIFFOUT_L37PZ0Z!,IO_1C_M33/DQS14L/DIFFIO_RX_L22P/DIFFOUT_L44Pd0d!-IO_1C_M34/DQSN14L/DIFFIO_RX_L22N/DIFFOUT_L44Nn0n!+IO_1C_N33/DQ13L/DIFFIO_RX_L21P/DIFFOUT_L42Px0x!51+IO_1C_N34/DQ13L/DIFFIO_RX_L21N/DIFFOUT_L42N0!+IO_1C_P31/DQ12L/DIFFIO_TX_L20P/DIFFOUT_L39P0!+IO_1C_P32/DQ12L/DIFFIO_TX_L20N/DIFFOUT_L39N0!+IO_1C_R30/DQ15L/DIFFIO_TX_L24P/DIFFOUT_L47P0!.IO_1C_T30***/DQ13L/DIFFIO_TX_L21P/DIFFOUT_L41P0!+IO_1C_V28/DQ14L/DIFFIO_TX_L23N/DIFFOUT_L45N0!+IO_1C_W28/DQ14L/DIFFIO_TX_L23P/DIFFOUT_L45P0!'0PEP4S100G5ES1F1517-3EP4S100G5ES1F1517-3.NormalEP4S100G5ES1F1517-3.Normal0(.nZ"\EP4S100G5ES1F1517 (For ES1 silicon only) VERSION : 1.0 PAGE : 3 of 14 DATE : JUNE 2009 .X d"sNote : Pins with this symbol (***) can only be used as single-ended I/O. Please refer to pin-out file for details. C:IO_2A_AJ29/PLL_L4_FB_CLKOUT0P/DIFFIO_TX_L56P/DIFFOUT_L112P !7IO_2A_AK29/PLL_L4_CLKOUT0N/DIFFIO_TX_L56N/DIFFOUT_L112N!"RUP2A/DIFFIO_RX_L56P/DIFFOUT_L111P((!"RDN2A/DIFFIO_RX_L56N/DIFFOUT_L111N22!,IO_2A_AC26/DQ28L/DIFFIO_TX_L45P/DIFFOUT_L90PFF!51,IO_2A_AD26/DQ28L/DIFFIO_TX_L45N/DIFFOUT_L90NPP!,IO_2A_AD27/DQ28L/DIFFIO_TX_L46P/DIFFOUT_L92PZZ!-IO_2A_AE26/DQ32L/DIFFIO_TX_L51P/DIFFOUT_L102Pdd!,IO_2A_AE27/DQ28L/DIFFIO_TX_L46N/DIFFOUT_L92Nnn!-IO_2A_AF26/DQ32L/DIFFIO_TX_L51N/DIFFOUT_L102Nxx!-IO_2A_AG27/DQ34L/DIFFIO_TX_L54P/DIFFOUT_L108P!-IO_2A_AG28/DQ33L/DIFFIO_TX_L53P/DIFFOUT_L106P!51,IO_2A_AG29/DQ30L/DIFFIO_TX_L49P/DIFFOUT_L98P!-IO_2A_AH27/DQ34L/DIFFIO_TX_L54N/DIFFOUT_L108N!-IO_2A_AH28/DQ33L/DIFFIO_TX_L53N/DIFFOUT_L106N!,IO_2A_AH29/DQ30L/DIFFIO_TX_L49N/DIFFOUT_L98N!,IO_2A_AH30/DQ29L/DIFFIO_TX_L47N/DIFFOUT_L94N!,IO_2A_AJ31/DQ29L/DIFFIO_TX_L47P/DIFFOUT_L94P!-IO_2A_AK30/DQ32L/DIFFIO_TX_L52P/DIFFOUT_L104P!-IO_2A_AK31/DQ31L/DIFFIO_TX_L50P/DIFFOUT_L100P!,IO_2A_AK32/DQ30L/DIFFIO_TX_L48P/DIFFOUT_L96P!-IO_2A_AL29/DQ34L/DIFFIO_TX_L55P/DIFFOUT_L110P!51-IO_2A_AL30/DQ32L/DIFFIO_TX_L52N/DIFFOUT_L104N!-IO_2A_AL31/DQ31L/DIFFIO_TX_L50N/DIFFOUT_L100N!,IO_2A_AL32/DQ30L/DIFFIO_TX_L48N/DIFFOUT_L96N!-IO_2A_AM29/DQ34L/DIFFIO_TX_L55N/DIFFOUT_L110N!.IO_2A_AM31/DQS32L/DIFFIO_RX_L52P/DIFFOUT_L103P""!.IO_2A_AN30/DQS31L/DIFFIO_RX_L51P/DIFFOUT_L101P,,!/IO_2A_AN31/DQSN32L/DIFFIO_RX_L52N/DIFFOUT_L103N66!&IO_2A_AN32/DIFFIO_RX_L45P/DIFFOUT_L89P@@!-IO_2A_AN33/DQS28L/DIFFIO_RX_L46P/DIFFOUT_L91PJJ!/IO_2A_AP30/DQSN31L/DIFFIO_RX_L51N/DIFFOUT_L101NTT!,IO_2A_AP32/DQ31L/DIFFIO_RX_L50P/DIFFOUT_L99P^^!&IO_2A_AP33/DIFFIO_RX_L45N/DIFFOUT_L89Nhh!.IO_2A_AP34/DQSN28L/DIFFIO_RX_L46N/DIFFOUT_L91Nrr!.IO_2A_AR31/DQS33L/DIFFIO_RX_L54P/DIFFOUT_L107P||!,IO_2A_AR32/DQ31L/DIFFIO_RX_L50N/DIFFOUT_L99N!,IO_2A_AR34/DQ29L/DIFFIO_RX_L47N/DIFFOUT_L93N!/IO_2A_AT30/DQSN33L/DIFFIO_RX_L54N/DIFFOUT_L107N!-IO_2A_AT31/DQ33L/DIFFIO_RX_L53P/DIFFOUT_L105P!.IO_2A_AT32/DQS34L/DIFFIO_RX_L55P/DIFFOUT_L109P!-IO_2A_AT33/DQS29L/DIFFIO_RX_L48P/DIFFOUT_L95P!,IO_2A_AT34/DQ29L/DIFFIO_RX_L47P/DIFFOUT_L93P!-IO_2A_AU31/DQ33L/DIFFIO_RX_L53N/DIFFOUT_L105N!/IO_2A_AU32/DQSN34L/DIFFIO_RX_L55N/DIFFOUT_L109N!.IO_2A_AU33/DQSN29L/DIFFIO_RX_L48N/DIFFOUT_L95N!,IO_2C_AB27/DQ19L/DIFFIO_TX_L31P/DIFFOUT_L62PFF!,IO_2C_AB28/DQ19L/DIFFIO_TX_L31N/DIFFOUT_L62NPP!/IO_2C_AB30***/DQ18L/DIFFIO_TX_L30P/DIFFOUT_L60PZZ!,IO_2C_AC28/DQ19L/DIFFIO_TX_L32P/DIFFOUT_L64Pdd!,IO_2C_AC29/DQ19L/DIFFIO_TX_L32N/DIFFOUT_L64Nnn!,IO_2C_AD28/DQ21L/DIFFIO_TX_L34P/DIFFOUT_L68Pxx!,IO_2C_AD29/DQ21L/DIFFIO_TX_L34N/DIFFOUT_L68N!,IO_2C_AD30/DQ22L/DIFFIO_TX_L36P/DIFFOUT_L72P!,IO_2C_AE28/DQ21L/DIFFIO_TX_L35P/DIFFOUT_L70P!,IO_2C_AE29/DQ21L/DIFFIO_TX_L35N/DIFFOUT_L70N!,IO_2C_AE30/DQ23L/DIFFIO_TX_L38P/DIFFOUT_L76P!,IO_2C_AF29/DQ23L/DIFFIO_TX_L37P/DIFFOUT_L74P!,IO_2C_AG30/DQ23L/DIFFIO_TX_L37N/DIFFOUT_L74N!-IO_2C_AH32/DQS21L/DIFFIO_RX_L35P/DIFFOUT_L69P!51 .IO_2C_AH33/DQSN21L/DIFFIO_RX_L35N/DIFFOUT_L69N!-IO_2C_AJ32/DQS23L/DIFFIO_RX_L38P/DIFFOUT_L75P!.IO_2C_AK33/DQSN23L/DIFFIO_RX_L38N/DIFFOUT_L75N!,IO_2C_AK34/DQ20L/DIFFIO_RX_L33P/DIFFOUT_L65P!0IO_2C_AL34***/DQS20L/DIFFIO_RX_L34P/DIFFOUT_L67P!-IO_2C_AM34/DQS22L/DIFFIO_RX_L37P/DIFFOUT_L73P!,IO_2C_AN34/DQ22L/DIFFIO_RX_L36P/DIFFOUT_L71P!'0PEP4S100G5ES1F1517-4EP4S100G5ES1F1517-4.NormalEP4S100G5ES1F1517-4.Normal0(N.nn@\EP4S100G5ES1F1517 (For ES1 silicon only) VERSION : 1.0 PAGE : 4 of 14 DATE : JUNE 2009 N\'IO_3C_AP21/PLL_B1_CLKOUT0N/DIFFOUT_B61N !'IO_3C_AN21/PLL_B1_CLKOUT0P/DIFFOUT_B61P!9IO_3C_AT22/PLL_B1_FBP/CLKOUT1/DIFFIO_RX_B31P/DIFFOUT_B62P!9IO_3C_AU22/PLL_B1_FBN/CLKOUT2/DIFFIO_RX_B31N/DIFFOUT_B62N((!&IO_3C_AH20/PLL_B1_CLKOUT3/DIFFOUT_B59P22!&IO_3C_AJ20/PLL_B1_CLKOUT4/DIFFOUT_B59N<<!&RDN3A/DIFFIO_RX_B1N/DIFFOUT_B2N/DQSN1BPP!%RUP3A/DIFFIO_RX_B1P/DIFFOUT_B2P/DQS1BZZ!)RDN3C/DIFFIO_RX_B25N/DIFFOUT_B50N/DQSN17Bdd!(RUP3C/DIFFIO_RX_B25P/DIFFOUT_B50P/DQS17Bnn!IO_3A_AD25/DQ1B/DIFFOUT_B1N!IO_3A_AE24/DQ1B/DIFFOUT_B3N!IO_3A_AE25/DQ1B/DIFFOUT_B1P!IO_3A_AG24/DIFFOUT_B19N!IO_3A_AH24/DIFFOUT_B19P!IO_3A_AH26/DQ2B/DIFFOUT_B5N!)IO_3A_AJ25/DQ2B/DIFFIO_RX_B3P/DIFFOUT_B6P!*IO_3A_AJ26/DQS2B/DIFFIO_RX_B2P/DIFFOUT_B4P!)IO_3A_AK25/DQ2B/DIFFIO_RX_B3N/DIFFOUT_B6N!+IO_3A_AK26/DQSN2B/DIFFIO_RX_B2N/DIFFOUT_B4N!IO_3A_AK27/DQ1B/DIFFOUT_B3P!IO_3A_AL25/DQ5B/DIFFOUT_B15P!51IO_3A_AL27/DQ2B/DIFFOUT_B5P!+IO_3A_AM26/DQS5B/DIFFIO_RX_B7P/DIFFOUT_B14P!,IO_3A_AN26/DQSN5B/DIFFIO_RX_B7N/DIFFOUT_B14N!IO_3A_AN27/DQ5B/DIFFOUT_B13N!IO_3A_AP26/DQ5B/DIFFOUT_B15N""!IO_3A_AP27/DQ5B/DIFFOUT_B13P,,!+IO_3A_AP28/DQS6B/DIFFIO_RX_B8P/DIFFOUT_B16P66!,IO_3A_AR28/DQSN6B/DIFFIO_RX_B8N/DIFFOUT_B16N@@!&IO_3A_AT27/DIFFIO_RX_B10P/DIFFOUT_B20PJJ!*IO_3A_AT28/DQ6B/DIFFIO_RX_B9P/DIFFOUT_B18PTT!IO_3A_AT29/DQ6B/DIFFOUT_B17N^^!&IO_3A_AU27/DIFFIO_RX_B10N/DIFFOUT_B20Nhh!*IO_3A_AU28/DQ6B/DIFFIO_RX_B9N/DIFFOUT_B18Nrr!51IO_3A_AU29/DQ6B/DIFFOUT_B17P||!*IO_3A_AV28/DQ4B/DIFFIO_RX_B6P/DIFFOUT_B12P!+IO_3A_AV29/DQS4B/DIFFIO_RX_B5P/DIFFOUT_B10P!IO_3A_AV31/DQ3B/DIFFOUT_B9N!*IO_3A_AV32/DQS3B/DIFFIO_RX_B4P/DIFFOUT_B8P!IO_3A_AW27/DQ4B/DIFFOUT_B11P!51IO_3A_AW28/DQ4B/DIFFOUT_B11N!*IO_3A_AW29/DQ4B/DIFFIO_RX_B6N/DIFFOUT_B12N!,IO_3A_AW30/DQSN4B/DIFFIO_RX_B5N/DIFFOUT_B10N!IO_3A_AW31/DQ3B/DIFFOUT_B9P!+IO_3A_AW32/DQSN3B/DIFFIO_RX_B4N/DIFFOUT_B8N!IO_3A_AW33/DQ3B/DIFFOUT_B7P!IO_3A_AW34/DQ3B/DIFFOUT_B7N!IO_3B_AE22/DQ11B/DIFFOUT_B33NN l !IO_3B_AE23/DQ11B/DIFFOUT_B31PNl!-IO_3B_AF22/DQS11B/DIFFIO_RX_B16P/DIFFOUT_B32PNl!IO_3B_AF23/DQ11B/DIFFOUT_B33PN(l(!.IO_3B_AG22/DQSN11B/DIFFIO_RX_B16N/DIFFOUT_B32NN2l2!IO_3B_AH22/DQ11B/DIFFOUT_B31NN<l<!,IO_3B_AH23/DQ12B/DIFFIO_RX_B18P/DIFFOUT_B36PNFlF!IO_3B_AJ22/DQ12B/DIFFOUT_B35PNPlP!,IO_3B_AJ23/DQ12B/DIFFIO_RX_B18N/DIFFOUT_B36NNZlZ!-IO_3B_AK23/DQS12B/DIFFIO_RX_B17P/DIFFOUT_B34PNdld!IO_3B_AK24/DQ12B/DIFFOUT_B35NNnln!.IO_3B_AL23/DQSN12B/DIFFIO_RX_B17N/DIFFOUT_B34NNxlx!IO_3B_AM25/DQ9B/DIFFOUT_B25NNl!51S,IO_3B_AN24/DQS9B/DIFFIO_RX_B13P/DIFFOUT_B26PNl!IO_3B_AN25/DQ9B/DIFFOUT_B25PNl!-IO_3B_AP24/DQSN9B/DIFFIO_RX_B13N/DIFFOUT_B26NNl!IO_3B_AP25/DQ9B/DIFFOUT_B27NNl!IO_3B_AR25/DQ9B/DIFFOUT_B27PNl!IO_3B_AT25/DQ10B/DIFFOUT_B29NNl!-IO_3B_AT26/DQS10B/DIFFIO_RX_B14P/DIFFOUT_B28PNl!IO_3B_AU25/DQ10B/DIFFOUT_B29PNl!.IO_3B_AU26/DQSN10B/DIFFIO_RX_B14N/DIFFOUT_B28NNl!,IO_3B_AV26/DQ10B/DIFFIO_RX_B15P/DIFFOUT_B30PNl!,IO_3B_AW26/DQ10B/DIFFIO_RX_B15N/DIFFOUT_B30NNl!IO_3C_AD21/DQ19B/DIFFOUT_B55PNl!-IO_3C_AE20/DQS19B/DIFFIO_RX_B28P/DIFFOUT_B56PNl!IO_3C_AE21/DQ19B/DIFFOUT_B57NNl!.IO_3C_AF20/DQSN19B/DIFFIO_RX_B28N/DIFFOUT_B56NN"l"!IO_3C_AG20/DQ19B/DIFFOUT_B55NN,l,!IO_3C_AG21/DQ19B/DIFFOUT_B57PN6l6!IO_3C_AL21/DQ17B/DIFFOUT_B51NN@l@!IO_3C_AL22/DQ17B/DIFFOUT_B51PNJlJ!IO_3C_AM23/DQ17B/DIFFOUT_B49PNTlT!IO_3C_AN23/DQ17B/DIFFOUT_B49NN^l^!IO_3C_AP23/DQ18B/DIFFOUT_B53PNhlh!IO_3C_AR23/DQ18B/DIFFOUT_B53NNrlr!,IO_3C_AT23/DQ18B/DIFFIO_RX_B27P/DIFFOUT_B54PN|l|!-IO_3C_AT24/DQS18B/DIFFIO_RX_B26P/DIFFOUT_B52PNl!,IO_3C_AU23/DQ18B/DIFFIO_RX_B27N/DIFFOUT_B54NNl!.IO_3C_AU24/DQSN18B/DIFFIO_RX_B26N/DIFFOUT_B52NNl!&IO_3C_AV23/DIFFIO_RX_B30P/DIFFOUT_B60PNl!&IO_3C_AV25/DIFFIO_RX_B29P/DIFFOUT_B58PNl!&IO_3C_AW23/DIFFIO_RX_B30N/DIFFOUT_B60NNl!&IO_3C_AW25/DIFFIO_RX_B29N/DIFFOUT_B58NNl!'0PEP4S100G5ES1F1517-5EP4S100G5ES1F1517-5.NormalEP4S100G5ES1F1517-5.Normal0(.nZ"\EP4S100G5ES1F1517 (For ES1 silicon only) VERSION : 1.0 PAGE : 5 of 14 DATE : JUNE 2009 \'IO_4C_AN20/PLL_B2_CLKOUT0P/DIFFOUT_B68P !'IO_4C_AP20/PLL_B2_CLKOUT0N/DIFFOUT_B68N!9IO_4C_AR20/PLL_B2_FBP/CLKOUT1/DIFFIO_RX_B34P/DIFFOUT_B67P!9IO_4C_AT20/PLL_B2_FBN/CLKOUT2/DIFFIO_RX_B34N/DIFFOUT_B67N((!&IO_4C_AH18/PLL_B2_CLKOUT3/DIFFOUT_B70P22!&IO_4C_AH19/PLL_B2_CLKOUT4/DIFFOUT_B70N<<!)RUP4A/DIFFIO_RX_B64P/DIFFOUT_B127P/DQS38BPP!*RDN4A/DIFFIO_RX_B64N/DIFFOUT_B127N/DQSN38BZZ!IO_4A_AD15/DQ38B/DIFFOUT_B128Pnn!IO_4A_AE15/DQ38B/DIFFOUT_B128Nxx!IO_4A_AE16/DIFFOUT_B110P!IO_4A_AF16/DIFFOUT_B110N!51IO_4A_AG14/DQ38B/DIFFOUT_B126P!IO_4A_AG15/DQ38B/DIFFOUT_B126N!IO_4A_AH13/DQ37B/DIFFOUT_B124P!.IO_4A_AH14/DQS37B/DIFFIO_RX_B63P/DIFFOUT_B125P!-IO_4A_AJ13/DQ37B/DIFFIO_RX_B62P/DIFFOUT_B123P!/IO_4A_AJ14/DQSN37B/DIFFIO_RX_B63N/DIFFOUT_B125N!-IO_4A_AK13/DQ37B/DIFFIO_RX_B62N/DIFFOUT_B123N!IO_4A_AK14/DQ37B/DIFFOUT_B124N!.IO_4A_AL13/DQS36B/DIFFIO_RX_B61P/DIFFOUT_B121P!IO_4A_AL14/DQ36B/DIFFOUT_B122P!51IO_4A_AL15/DQ36B/DIFFOUT_B120N!/IO_4A_AM13/DQSN36B/DIFFIO_RX_B61N/DIFFOUT_B121N!IO_4A_AM14/DQ36B/DIFFOUT_B122N!IO_4A_AN13/DQ36B/DIFFOUT_B120P!IO_4A_AN14/DQ35B/DIFFOUT_B118N""!'IO_4A_AN15/DIFFIO_RX_B55P/DIFFOUT_B109P,,!IO_4A_AP13/DQ35B/DIFFOUT_B118P66!-IO_4A_AP14/DQ35B/DIFFIO_RX_B59P/DIFFOUT_B117P@@!'IO_4A_AP15/DIFFIO_RX_B55N/DIFFOUT_B109NJJ!.IO_4A_AR13/DQS35B/DIFFIO_RX_B60P/DIFFOUT_B119PTT!-IO_4A_AR14/DQ35B/DIFFIO_RX_B59N/DIFFOUT_B117N^^!IO_4A_AT12/DQ34B/DIFFOUT_B116Phh!/IO_4A_AT13/DQSN35B/DIFFIO_RX_B60N/DIFFOUT_B119Nrr!IO_4A_AT14/DQ33B/DIFFOUT_B112P||!.IO_4A_AU11/DQS34B/DIFFIO_RX_B58P/DIFFOUT_B115P!51IO_4A_AU12/DQ34B/DIFFOUT_B116N!IO_4A_AU14/DQ33B/DIFFOUT_B112N!/IO_4A_AV11/DQSN34B/DIFFIO_RX_B58N/DIFFOUT_B115N!.IO_4A_AV13/DQS33B/DIFFIO_RX_B57P/DIFFOUT_B113P!-IO_4A_AV14/DQ33B/DIFFIO_RX_B56P/DIFFOUT_B111P!IO_4A_AW11/DQ34B/DIFFOUT_B114N!IO_4A_AW12/DQ34B/DIFFOUT_B114P!/IO_4A_AW13/DQSN33B/DIFFIO_RX_B57N/DIFFOUT_B113N!-IO_4A_AW14/DQ33B/DIFFIO_RX_B56N/DIFFOUT_B111N!IO_4B_AE17/DQ28B/DIFFOUT_B96N  !-IO_4B_AF17/DQS28B/DIFFIO_RX_B49P/DIFFOUT_B97P!IO_4B_AG16/DQ28B/DIFFOUT_B98N!.IO_4B_AG17/DQSN28B/DIFFIO_RX_B49N/DIFFOUT_B97N((!IO_4B_AH16/DQ28B/DIFFOUT_B98P22!IO_4B_AH17/DQ28B/DIFFOUT_B96P<<!IO_4B_AJ16/DQ27B/DIFFOUT_B94PFF!-IO_4B_AK16/DQS27B/DIFFIO_RX_B48P/DIFFOUT_B95PPP!,IO_4B_AK17/DQ27B/DIFFIO_RX_B47P/DIFFOUT_B93PZZ!.IO_4B_AL16/DQSN27B/DIFFIO_RX_B48N/DIFFOUT_B95Ndd!,IO_4B_AL17/DQ27B/DIFFIO_RX_B47N/DIFFOUT_B93Nnn!IO_4B_AM17/DQ27B/DIFFOUT_B94Nxx!IO_4B_AN16/DQ29B/DIFFOUT_B100P!IO_4B_AN17/DQ29B/DIFFOUT_B100N!.IO_4B_AP16/DQS29B/DIFFIO_RX_B51P/DIFFOUT_B101P!,IO_4B_AP17/DQ29B/DIFFIO_RX_B50P/DIFFOUT_B99P!/IO_4B_AR16/DQSN29B/DIFFIO_RX_B51N/DIFFOUT_B101N!,IO_4B_AR17/DQ29B/DIFFIO_RX_B50N/DIFFOUT_B99N!IO_4B_AT15/DQ30B/DIFFOUT_B104N!IO_4B_AT16/DQ30B/DIFFOUT_B102N!IO_4B_AU15/DQ30B/DIFFOUT_B104P!.IO_4B_AU16/DQS30B/DIFFIO_RX_B52P/DIFFOUT_B103P!/IO_4B_AV16/DQSN30B/DIFFIO_RX_B52N/DIFFOUT_B103N!IO_4B_AW16/DQ30B/DIFFOUT_B102P!IO_4C_AD19/DQ20B/DIFFOUT_B72P!IO_4C_AE18/DQ20B/DIFFOUT_B74N!51-IO_4C_AE19/DQS20B/DIFFIO_RX_B37P/DIFFOUT_B73P!.IO_4C_AF19/DQSN20B/DIFFIO_RX_B37N/DIFFOUT_B73N""!IO_4C_AG18/DQ20B/DIFFOUT_B74P,,!IO_4C_AG19/DQ20B/DIFFOUT_B72N66!IO_4C_AM19/DQ22B/DIFFOUT_B78N@@!-IO_4C_AN18/DQS22B/DIFFIO_RX_B40P/DIFFOUT_B79PJJ!IO_4C_AN19/DQ22B/DIFFOUT_B78PTT!.IO_4C_AP18/DQSN22B/DIFFIO_RX_B40N/DIFFOUT_B79N^^!IO_4C_AP19/DQ22B/DIFFOUT_B80Nhh!IO_4C_AR19/DQ22B/DIFFOUT_B80Prr!IO_4C_AT17/DQ21B/DIFFOUT_B76P||!,IO_4C_AT18/DQ21B/DIFFIO_RX_B38P/DIFFOUT_B75P!&IO_4C_AT19/DIFFIO_RX_B36P/DIFFOUT_B71P!-IO_4C_AU17/DQS21B/DIFFIO_RX_B39P/DIFFOUT_B77P!,IO_4C_AU18/DQ21B/DIFFIO_RX_B38N/DIFFOUT_B75N!&IO_4C_AU19/DIFFIO_RX_B36N/DIFFOUT_B71N!&IO_4C_AU20/DIFFIO_RX_B35P/DIFFOUT_B69P!.IO_4C_AV17/DQSN21B/DIFFIO_RX_B39N/DIFFOUT_B77N!&IO_4C_AV20/DIFFIO_RX_B35N/DIFFOUT_B69N!IO_4C_AW18/DQ21B/DIFFOUT_B76N!'0PEP4S100G5ES1F1517P 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!&IO_8C_R24/PLL_T1_CLKOUT0N/DIFFOUT_T68N!8IO_8C_J24/PLL_T1_FBP/CLKOUT1/DIFFIO_RX_T34P/DIFFOUT_T67P!8IO_8C_H23/PLL_T1_FBN/CLKOUT2/DIFFIO_RX_T34N/DIFFOUT_T67N((!%IO_8C_M25/PLL_T1_CLKOUT3/DIFFOUT_T70P22!%IO_8C_L25/PLL_T1_CLKOUT4/DIFFOUT_T70N<<!)RUP8A/DIFFIO_RX_T64P/DIFFOUT_T127P/DQS38TPP!U*RDN8A/DIFFIO_RX_T64N/DIFFOUT_T127N/DQSN38TZZ!(RUP8C/DIFFIO_RX_T40P/DIFFOUT_T79P/DQS22Tdd!)RDN8C/DIFFIO_RX_T40N/DIFFOUT_T79N/DQSN22Tnn!.IO_8A_A32/DQSN37T/DIFFIO_RX_T63N/DIFFOUT_T125N!IO_8A_A34/DQ38T/DIFFOUT_T126P!93U-IO_8A_B32/DQS37T/DIFFIO_RX_T63P/DIFFOUT_T125P!IO_8A_B34/DQ38T/DIFFOUT_T126N!IO_8A_C31/DQ35T/DIFFOUT_T118N!,IO_8A_C32/DQ37T/DIFFOUT_T124N!se,,IO_8A_C33/DQ37T/DIFFIO_RX_T62N/DIFFOUT_T123N!|IO_8A_C35/DQ38T/DIFFOUT_T128P!IO_8A_D31/DQ35T/DIFFOUT_T118P! IO_8A_D32/DQ37T/DIFFOUT_T124P!,IO_8A_D33/DQ37T/DIFFIO_RX_T62P/DIFFOUT_T123P!UIO_8A_D35/DQ38T/DIFFOUT_T128N!93,IO_8A_E31/DQ35T/DIFFIO_RX_T59N/DIFFOUT_T117N!.IO_8A_E32/DQSN35T/DIFFIO_RX_T60N/DIFFOUT_T119N!.IO_8A_E34/DQSN36T/DIFFIO_RX_T61N/DIFFOUT_T121N!,IO_8A_E35/DQ36T/DIFFOUT_T120P!,IO_8A_F31/DQ35T/DIFFIO_RX_T59P/DIFFOUT_T117P""!|-IO_8A_F32/DQS35T/DIFFIO_RX_T60P/DIFFOUT_T119P,,!IO_8A_F33/DQ36T/DIFFOUT_T122N66!-IO_8A_F34/DQS36T/DIFFIO_RX_T61P/DIFFOUT_T121P@@!IO_8A_F35/DQ36T/DIFFOUT_T122PJJ!.IO_8A_G30/DQSN33T/DIFFIO_RX_T57N/DIFFOUT_T113NTT!-IO_8A_G31/DQS33T/DIFFIO_RX_T57P/DIFFOUT_T113P^^!IO_8A_G33/DQ36T/DIFFOUT_T120Nhh!,IO_8A_H31/DQ33T/DIFFIO_RX_T56N/DIFFOUT_T111Nrr!IO_8A_H32/DQ34T/DIFFOUT_T114N||!,IO_8A_J30/DQ33T/DIFFIO_RX_T56P/DIFFOUT_T111P!93IO_8A_J32/DQ34T/DIFFOUT_T114P!IO_8A_J33/DQ34T/DIFFOUT_T116P!IO_8A_K29/DQ33T/DIFFOUT_T112P!IO_8A_K30/DQ33T/DIFFOUT_T112N!.IO_8A_K31/DQSN34T/DIFFIO_RX_T58N/DIFFOUT_T115N!seetIO_8A_K32/DQ34T/DIFFOUT_T116N!|IO_8A_L29/DQ32T/DIFFOUT_T110P!-IO_8A_L32/DQS34T/DIFFIO_RX_T58P/DIFFOUT_T115P!,IO_8A_M29/DQ32T/DIFFOUT_T110N!.IO_8A_M30/DQSN32T/DIFFIO_RX_T55N/DIFFOUT_T109N!IO_8A_N28/DQ31T/DIFFOUT_T106P!IO_8A_N29/DQ32T/DIFFOUT_T108P!IO_8A_N30/DQ32T/DIFFOUT_T108N!-IO_8A_N31/DQS32T/DIFFIO_RX_T55P/DIFFOUT_T109P!IO_8A_P28/DQ31T/DIFFOUT_T106N!.IO_8A_P29/DQSN31T/DIFFIO_RX_T54N/DIFFOUT_T107N&&!,IO_8A_R27/DQ31T/DIFFIO_RX_T53N/DIFFOUT_T105N00!|-IO_8A_R28/DQS31T/DIFFIO_RX_T54P/DIFFOUT_T107P::!,IO_8A_T27/DQ31T/DIFFIO_RX_T53P/DIFFOUT_T105PDD!IO_8B_A27/DQ29T/DIFFOUT_T100P  !93UIO_8B_A28/DQ29T/DIFFOUT_T100N!IO_8B_A29/DQ30T/DIFFOUT_T102P!.IO_8B_A30/DQSN30T/DIFFIO_RX_T52N/DIFFOUT_T103N((!-IO_8B_A31/DQS30T/DIFFIO_RX_T52P/DIFFOUT_T103P22!+IO_8B_B26/DQ29T/DIFFIO_RX_T50N/DIFFOUT_T99N<<!,.IO_8B_B28/DQSN29T/DIFFIO_RX_T51N/DIFFOUT_T101NFF!93,IO_8B_B29/DQ30T/DIFFOUT_T102NPP!,IO_8B_B31/DQ30T/DIFFOUT_T104NZZ!+IO_8B_C26/DQ29T/DIFFIO_RX_T50P/DIFFOUT_T99Pdd!-IO_8B_C28/DQS29T/DIFFIO_RX_T51P/DIFFOUT_T101Pnn!-IO_8B_C29/DQSN28T/DIFFIO_RX_T49N/DIFFOUT_T97Nxx!IO_8B_C30/DQ30T/DIFFOUT_T104P!+IO_8B_D26/DQ27T/DIFFIO_RX_T47N/DIFFOUT_T93N!+IO_8B_D27/DQ27T/DIFFIO_RX_T47P/DIFFOUT_T93P!IO_8B_D28/DQ28T/DIFFOUT_T96P!,IO_8B_D29/DQS28T/DIFFIO_RX_T49P/DIFFOUT_T97P!93IO_8B_D30/DQ28T/DIFFOUT_T98N!IO_8B_E26/DQ27T/DIFFOUT_T94N!IO_8B_E28/DQ28T/DIFFOUT_T96N!IO_8B_E29/DQ28T/DIFFOUT_T98P!IO_8B_F26/DQ27T/DIFFOUT_T94P!,lt -IO_8B_F27/DQSN27T/DIFFIO_RX_T48N/DIFFOUT_T95N!,IO_8B_F28/DQS27T/DIFFIO_RX_T48P/DIFFOUT_T95P!IO_8B_F29/DQ26T/DIFFOUT_T90P!+IO_8B_G26/DQ25T/DIFFIO_RX_T44N/DIFFOUT_T87N!93,-IO_8B_G28/DQSN25T/DIFFIO_RX_T45N/DIFFOUT_T89N!IO_8B_G29/DQ26T/DIFFOUT_T90N!+IO_8B_H26/DQ25T/DIFFIO_RX_T44P/DIFFOUT_T87P""!,IO_8B_H28/DQS25T/DIFFIO_RX_T45P/DIFFOUT_T89P,,!-IO_8B_H29/DQSN26T/DIFFIO_RX_T46N/DIFFOUT_T91N66!IO_8B_J26/DQ25T/DIFFOUT_T88P@@!IO_8B_J27/DQ25T/DIFFOUT_T88NJJ!IO_8B_J28/DQ26T/DIFFOUT_T92PTT!,IO_8B_J29/DQS26T/DIFFIO_RX_T46P/DIFFOUT_T91P^^!IO_8B_K26/DQ24T/DIFFOUT_T84Phh!IO_8B_K28/DQ26T/DIFFOUT_T92Nrr!IO_8B_L26/DQ24T/DIFFOUT_T86P||!IO_8B_M26/DQ24T/DIFFOUT_T86N!-IO_8B_M27/DQSN24T/DIFFIO_RX_T43N/DIFFOUT_T85N!,IO_8B_M28/DQS24T/DIFFIO_RX_T43P/DIFFOUT_T85P!+IO_8B_N25/DQ23T/DIFFIO_RX_T41N/DIFFOUT_T81N!-IO_8B_N26/DQSN23T/DIFFIO_RX_T42N/DIFFOUT_T83N!,IO_8B_N27/DQ24T/DIFFOUT_T84N!+IO_8B_P25/DQ23T/DIFFIO_RX_T41P/DIFFOUT_T81P!,IO_8B_P26/DQS23T/DIFFIO_RX_T42P/DIFFOUT_T83P!IO_8B_R25/DQ23T/DIFFOUT_T82P!IO_8B_T25/DQ23T/DIFFOUT_T82N!IO_8C_A22/DQ21T/DIFFOUT_T76P!IO_8C_A23/DQ21T/DIFFOUT_T76N!IO_8C_A24/DQ22T/DIFFOUT_T78P!IO_8C_A25/DQ22T/DIFFOUT_T80N!,-IO_8C_B23/DQSN21T/DIFFIO_RX_T39N/DIFFOUT_T77N!,IO_8C_C23/DQS21T/DIFFIO_RX_T39P/DIFFOUT_T77P&&!IO_8C_C24/DQ22T/DIFFOUT_T78N00!IO_8C_C25/DQ22T/DIFFOUT_T80P::!+IO_8C_D23/DQ21T/DIFFIO_RX_T38N/DIFFOUT_T75NDD!+IO_8C_D24/DQ21T/DIFFIO_RX_T38P/DIFFOUT_T75PNN!-IO_8C_D25/DQSN20T/DIFFIO_RX_T37N/DIFFOUT_T73NXX!,IO_8C_E25/DQS20T/DIFFIO_RX_T37P/DIFFOUT_T73Pbb!IO_8C_F23/DQ20T/DIFFOUT_T72Nll!IO_8C_F24/DQ20T/DIFFOUT_T74Pvv!IO_8C_F25/DQ20T/DIFFOUT_T74N!IO_8C_G23/DQ20T/DIFFOUT_T72P!%IO_8C_G24/DIFFIO_RX_T35N/DIFFOUT_T69N!U%IO_8C_G25/DIFFIO_RX_T35P/DIFFOUT_T69P!%IO_8C_J25/DIFFIO_RX_T36N/DIFFOUT_T71N!%IO_8C_K25/DIFFIO_RX_T36P/DIFFOUT_T71P!'0PEP4S100G5ES1F1932-1EP4S100G5ES1F1932-1.NormalEP4S100G5ES1F1932-1.Normal0(^.^p]EP4S100G5ES1F1932 (For ES1 silicon only) VERSION : 1.0 PAGE : 1 of 14 DATE : JUNE 2009 ^*VCC !VCC!VCC!VCC((!VCC22!VCC<<!VCCFF!93VCCPP!VCCZZ!VCCdd!VCCnn!VCCxx!+VCC!lt VCC!93VCC!VCC!VCC!"VCC!VCC!VCC!VCC!|VCC!VCC!UT_VCC!930"VCC!VCC!VCC!"VCC!VCC""!VCC,,!VCC66!VCC@@!VCCJJ!VCCTT!VCC^^!VCChh!VCCrr!VCC||!VCC!93VCC!VCC!VCC!VCC!VCC!VCC!VCC! VCC!"N"VCC!VCC!VCC!tVCC!VCC!"VCC!VCC!VCC&&!"VCC00!VCC::!VCCDD!VCCNN!VCCXX!VCCbb!VCCll!"VCCvv!VCC!VCC!"VCC!93"VCC!"VCC!VCC!VCC!VCC!VCC!VCC!VCC!VCC!VCC!93"VCC!VCC  !"VCC!93E"VCC  !VCC**!VCC44!VCC>>!VCCHH!VCCRR!"VCC\\!VCCff!VCCpp!VCCzz!VCCPT!VCCPT!VCCPT!VCCPT!VCCPT!VCCPT!VCCPGM!VCCPGM! VCC_CLKIN3C! VCC_CLKIN4C!"" VCC_CLKIN7C! VCC_CLKIN8C!VCCBAT$$!VCCAUX88!VCCAUXBB!VCCAUXLL!VCCAUXVV!VCCA_Ljj!VCCA_Ltt!VCCA_R~~!VCCA_R! VCCH_GXBL0! VCCH_GXBL1!93" VCCH_GXBL2! VCCH_GXBL3! VCCH_GXBR0! VCCH_GXBR1! VCCH_GXBR2! VCCH_GXBR3! VCCL_GXBL0!"" VCCL_GXBL0!93E" VCCL_GXBL1  ! VCCL_GXBL1! VCCL_GXBL2! VCCL_GXBL2((!" VCCL_GXBL322! VCCL_GXBL3<<! VCCL_GXBR0FF! VCCL_GXBR0PP! VCCL_GXBR1ZZ! VCCL_GXBR1dd! VCCL_GXBR2nn! VCCL_GXBR2xx!"" VCCL_GXBR3!93" VCCL_GXBR3!VCCR_R!VCCR_R!VCCR_R!VCCR_R!"VCCR_L!VCCR_L!VCCR_L!VCCR_L!VCCT_R!VCCT_R!VCCT_R!VCCT_R!VCCT_L""!VCCT_L,,!VCCT_L66!VCCT_L@@! VCCA_PLL_B1  ! VCCA_PLL_B2!" VCCA_PLL_L1! VCCA_PLL_L2((! VCCA_PLL_L322! VCCA_PLL_L4<<! VCCA_PLL_R1FF! VCCA_PLL_R2PP! VCCA_PLL_R3ZZ! VCCA_PLL_R4dd! VCCA_PLL_T1nn! VCCA_PLL_T2xx! VCCD_PLL_B1! VCCD_PLL_B2! VCCD_PLL_L1! VCCD_PLL_L2! VCCD_PLL_L3! VCCD_PLL_L4! VCCD_PLL_R1! VCCD_PLL_R2! VCCD_PLL_R3! VCCD_PLL_R4! VCCD_PLL_T1! VCCD_PLL_T2!VCCIO1A!VCCIO1A!VCCIO1A!VCCIO1A""!VCCIO1A,,!VCCIO1C66!VCCIO1C@@!93"VCCIO2A^^!VCCIO2Ahh!VCCIO2Arr!VCCIO2A||!VCCIO2A!VCCIO2B!VCCIO2C!VCCIO3A!VCCIO3A!AEVCCIO3A!VCCIO3A!VCCIO3A!VCCIO3B!VCCIO3B!VCCIO3B!VCCIO3B!VCCIO3B&&!""VCCIO3C00!"VCCIO3C::!VCCIO3CDD!VCCIO4ANN!VCCIO4AXX!VCCIO4Abb!""VCCIO4All!"VCCIO4Avv!VCCIO4B!VCCIO4B!VCCIO4B!VCCIO4B!VCCIO4B!VCCIO4C!VCCIO4C!""VCCIO4C!VCCIO5A!VCCIO5A!VCCIO5A!VCCIO5A!VCCIO5A!VCCIO5B!VCCIO5B  !VCCIO5C!VCCIO5C44!VCCIO6AHH!VCCIO6ARR!""VCCIO6A\\!93"VCCIO6Aff!VCCIO6Cpp!VCCIO6Czz!VCCIO7A!VCCIO7A!VCCIO7A!VCCIO7A!VCCIO7A!VCCIO7B!VCCIO7B!VCCIO7B!VCCIO7B!VCCIO7B!VCCIO7C!93"VCCIO7C!VCCIO7C!VCCIO8A!VCCIO8A$$!VCCIO8A..!VCCIO8A88!VCCIO8ABB!VCCIO8BLL!VCCIO8BVV!VCCIO8B``!VCCIO8Bjj!VCCIO8Btt!VCCIO8C~~!VCCIO8C!VCCIO8C!VCCPD1A!VCCPD1C!VCCPD2A!3VCCPD2B!WVCCPD2C!VCCPD3A!3VCCPD3B!VCCPD3C!eVCCPD4A!yVCCPD4B!VCCPD4C  !VCCPD5A!cVCCPD5B!cVCCPD5C((!;VCCPD6A22!3VCCPD6C<<!`VCCPD7AFF!fVCCPD7BPP!setVCCPD7CZZ!sevVCCPD8Add!IVCCPD8Bnn!VCCPD8Cxx!VCCHIP_R!ed8VCCHIP_L!93VCCHIP_L!VCCHIP_R!@VCCHIP_R!ed2VCCHIP_L!tetVCCHIP_L!93CVCCHIP_L!93VCCHIP_R!93VCCHIP_R!onP_RVCCIO1CJJ!93OVCCIO1CTT!93VCCIO2B!93VCCIO2C!VCCIO2C!93VCCIO2C!yVCCIO5C**!VCCIO5C  !93VCCIO6A>>!93VCCIO6C!93VCCIO6C!93'0?PEP4S100G5ES1F1932-2EP4S100G5ES1F1932-2.NormalEP4S100G5ES1F1932-2.Normal0(:.p<@l]EP4S100G5ES1F1932 (For ES1 silicon only) VERSION : 1.0 PAGE : 2 of 14 DATE : JUNE 2009 .:BT@Note : 1) Pins with this symbol (**) can only be used in configuration mode. These pins can not be used as user I/O pins after configuration but only the RUP /RDN feature still available for package 1932..Xd@wNote : 2) Pins with this symbol (***) can only be used as single-ended I/O. Please refer to pin-out file for details. :43IO_1A_G34/PLL_L1_CLKOUT0N/DIFFIO_TX_L1N/DIFFOUT_L1N !6IO_1A_H34/PLL_L1_FB_CLKOUT0P/DIFFIO_TX_L1P/DIFFOUT_L1P!k 6IO_1C_AA30/PLL_L2_CLKOUT0N/DIFFIO_TX_L28N/DIFFOUT_L55N!et9IO_1C_AB30/PLL_L2_FB_CLKOUT0P/DIFFIO_TX_L28P/DIFFOUT_L55P((!eciRDN1A/DIFFIO_RX_L1N/DIFFOUT_L2N<<! RUP1A/DIFFIO_RX_L1P/DIFFOUT_L2PFF!B/UT_*IO_1A_F38/DQS3L/DIFFIO_RX_L5P/DIFFOUT_L10PZZ!  *IO_1A_F39/DQS6L/DIFFIO_RX_L9P/DIFFOUT_L18Pdd!+IO_1A_G37/DQSN4L/DIFFIO_RX_L6N/DIFFOUT_L12Nnn!!+IO_1A_G39/DQS7L/DIFFIO_RX_L11P/DIFFOUT_L22Pxx!!(IO_1A_H36/DQ2L/DIFFIO_RX_L4N/DIFFOUT_L8N!:#*IO_1A_H37/DQS4L/DIFFIO_RX_L6P/DIFFOUT_L12P!Z#*IO_1A_H38/DQ6L/DIFFIO_RX_L10N/DIFFOUT_L20N!B#*IO_1A_J34/DQSN1L/DIFFIO_RX_L2N/DIFFOUT_L4N!7#*IO_1A_J35/DQSN2L/DIFFIO_RX_L3N/DIFFOUT_L6N!#&#(IO_1A_J36/DQ2L/DIFFIO_RX_L4P/DIFFOUT_L8P!sey#)IO_1A_J37/DQ4L/DIFFIO_RX_L7N/DIFFOUT_L14N!seE#*IO_1A_J38/DQ6L/DIFFIO_RX_L10P/DIFFOUT_L20P!y#%IO_1A_J39/DIFFIO_RX_L12N/DIFFOUT_L24N!L#)IO_1A_K34/DQS1L/DIFFIO_RX_L2P/DIFFOUT_L4P!#%#)IO_1A_K35/DQS2L/DIFFIO_RX_L3P/DIFFOUT_L6P!#l#)IO_1A_K37/DQ4L/DIFFIO_RX_L7P/DIFFOUT_L14P!##%IO_1A_K39/DIFFIO_RX_L12P/DIFFOUT_L24P!Z#)IO_1A_L34/DQ5L/DIFFIO_TX_L9P/DIFFOUT_L17P!1#)IO_1A_L35/DQ5L/DIFFIO_TX_L9N/DIFFOUT_L17N!J#)IO_1A_L36/DQ3L/DIFFIO_TX_L6N/DIFFOUT_L11N!se#(IO_1A_M33/DQ1L/DIFFIO_TX_L2N/DIFFOUT_L3N""!!#(IO_1A_M35/DQ3L/DIFFIO_TX_L5N/DIFFOUT_L9N,,!m#)IO_1A_M36/DQ3L/DIFFIO_TX_L6P/DIFFOUT_L11P66!H#(IO_1A_N33/DQ1L/DIFFIO_TX_L2P/DIFFOUT_L3P@@!X#*IO_1A_N34/DQ6L/DIFFIO_TX_L10N/DIFFOUT_L19NJJ! #(IO_1A_N35/DQ3L/DIFFIO_TX_L5P/DIFFOUT_L9PTT!#(IO_1A_P31/DQ2L/DIFFIO_TX_L4N/DIFFOUT_L7N^^!!#*IO_1A_P32/DQ7L/DIFFIO_TX_L12P/DIFFOUT_L23Phh!W#(IO_1A_R30/DQ2L/DIFFIO_TX_L4P/DIFFOUT_L7Prr!J#(IO_1A_R31/DQ1L/DIFFIO_TX_L3N/DIFFOUT_L5N||!}#)IO_1A_T30/DQ4L/DIFFIO_TX_L7N/DIFFOUT_L13N!c(IO_1A_T31/DQ1L/DIFFIO_TX_L3P/DIFFOUT_L5P!]#)IO_1A_U30/DQ4L/DIFFIO_TX_L7P/DIFFOUT_L13P!#*IO_1A_V30/DQ7L/DIFFIO_TX_L11P/DIFFOUT_L21P!x#*IO_1A_V31/DQ7L/DIFFIO_TX_L11N/DIFFOUT_L21N!#)IO_1A_W30/DQ5L/DIFFIO_TX_L8P/DIFFOUT_L15P!#1#)IO_1A_W31/DQ5L/DIFFIO_TX_L8N/DIFFOUT_L15N!#[#,IO_1C_L38/DQS13L/DIFFIO_RX_L20P/DIFFOUT_L40P:ZXZ!-#-IO_1C_L39/DQSN13L/DIFFIO_RX_L20N/DIFFOUT_L40N:dXd!#r#,IO_1C_M37/DQS12L/DIFFIO_RX_L19P/DIFFOUT_L38P:nXn!#2#-IO_1C_M38/DQSN12L/DIFFIO_RX_L19N/DIFFOUT_L38N:xXx!##+IO_1C_M39/DQ13L/DIFFIO_RX_L21P/DIFFOUT_L42P:X!#.IO_1C_N39***/DQ15L/DIFFIO_RX_L24P/DIFFOUT_L48P:X! -IO_1C_R38/DQSN15L/DIFFIO_RX_L23N/DIFFOUT_L46N:X!k#+IO_1C_U32/DQ12L/DIFFIO_TX_L20N/DIFFOUT_L39N:X! +IO_1C_V32/DQ12L/DIFFIO_TX_L20P/DIFFOUT_L39P:X!'08PEP4S100G5ES1F1932-10EP4S100G5ES1F1932-10.NormalEP4S100G5ES1F1932-10.Normal0("."ptJD^EP4S100G5ES1F1932 (For ES1 silicon only) VERSION : 1.0 PAGE : 10 of 14 DATE : JUNE 2009 .JvYwNote : 2) Pins with this symbol (***) can only be used as single-ended I/O. Please refer to pin-out file for details. .rLJXNote : 1) Pins with this symbol (*) can be used as clock pins when the transceiver blocks operate at or below 6.375Gbps speed. Quartus II limits use of these clocks when same side transceivers operate above 8.5Gbps speed. "0 VREFB1AN0 ! VREFB1CN0! VREFB2AN0! VREFB2BN0((! VREFB2CN022!## VREFB3AN0<<! VREFB3BN0FF! VREFB3CN0PP!93`' VREFB4AN0ZZ! VREFB4BN0dd! VREFB4CN0nn! VREFB5AN0xx!- VREFB5BN0!- VREFB5CN0! VREFB6AN0! VREFB6CN0! VREFB7AN0!- VREFB7BN0!ame VREFB7CN0! VREFB8AN0! VREFB8BN0! VREFB8CN0!CLK1N  !93lt CLK1P!CLK3P!CLK3N((!-!CLK4N_DIFFIO_RX_B32N_DIFFOUT_B64N22!!CLK4P_DIFFIO_RX_B32P_DIFFOUT_B64P<<!CLK5N_DIFFOUT_B63NFF!CLK5P_DIFFOUT_B63PPP!!CLK6P_DIFFIO_RX_B33P_DIFFOUT_B65PZZ!!CLK6N_DIFFIO_RX_B33N_DIFFOUT_B65Ndd!CLK7P_DIFFOUT_B66Pnn!CLK7N_DIFFOUT_B66Nxx!-CLK8N!CLK8P!!CLK9P_DIFFIO_RX_R28P_DIFFOUT_R56P!CLK10P!93CLK10N_!"CLK11P_DIFFIO_RX_R29P_DIFFOUT_R57P!"CLK12N_DIFFIO_RX_T32N_DIFFOUT_T64N!"CLK12P_DIFFIO_RX_T32P_DIFFOUT_T64P!CLK13N_DIFFOUT_T63N!-CLK13P_DIFFOUT_T63P!"CLK14P_DIFFIO_RX_T33P_DIFFOUT_T65P!"CLK14N_DIFFIO_RX_T33N_DIFFOUT_T65N!-CLK15P_DIFFOUT_T66P!CLK15N_DIFFOUT_T66N!'0YPEP4S100G5ES1F1932-3EP4S100G5ES1F1932-3.NormalEP4S100G5ES1F1932-3.Normal0(l.j.,bDEP4S100G5ES1F1932 VERSION : 1.0 PAGE : 3 of 14 DATE : JUNE 2009 .NBh,Note : 2) Pins with this symbol (**) can only be used in configuration mode. These pins can not be used as user I/O pins after configuration but only the RUP /RDN feature still available for package 1932..lx,dwNote : 3) Pins with this symbol (***) can only be used as single-ended I/O. Please refer to pin-out file for details. .0LJ,Note : 1) Pins with this symbol (*) can be used as clock pins when the transceiver blocks operate at or below 6.375Gbps speed. Quartus II limits use of these clocks when same side transceivers operate above 8.5Gbps speed. lKIO_2A_AY39*/PLL_L4_CLKP !IO_2A_AY40*/PLL_L4_CLKN!#v#:IO_2A_AJ30/PLL_L4_FB_CLKOUT0P/DIFFIO_TX_L56P/DIFFOUT_L112P!#t#7IO_2A_AH30/PLL_L4_CLKOUT0N/DIFFIO_TX_L56N/DIFFOUT_L112N((!"RUP2A/DIFFIO_RX_L56P/DIFFOUT_L111P<<!"RDN2A/DIFFIO_RX_L56N/DIFFOUT_L111NFF!93/-IO_2A_AJ31/DQ31L/DIFFIO_TX_L50P/DIFFOUT_L100PZZ!-IO_2A_AJ32/DQ31L/DIFFIO_TX_L50N/DIFFOUT_L100Ndd!-IO_2A_AK31/DQ32L/DIFFIO_TX_L52P/DIFFOUT_L104Pnn!-IO_2A_AK32/DQ32L/DIFFIO_TX_L52N/DIFFOUT_L104Nxx!lt ,IO_2A_AL34/DQ30L/DIFFIO_TX_L48N/DIFFOUT_L96N!#,IO_2A_AM33/DQ30L/DIFFIO_TX_L48P/DIFFOUT_L96P!93,IO_2A_AM35/DQ28L/DIFFIO_TX_L46N/DIFFOUT_L92N!,IO_2A_AN33/DQ30L/DIFFIO_TX_L49P/DIFFOUT_L98P!,IO_2A_AN34/DQ30L/DIFFIO_TX_L49N/DIFFOUT_L98N!,IO_2A_AN35/DQ28L/DIFFIO_TX_L46P/DIFFOUT_L92P!/,IO_2A_AN37/DQ29L/DIFFIO_RX_L47P/DIFFOUT_L93P!,IO_2A_AN38/DQ29L/DIFFIO_RX_L47N/DIFFOUT_L93N!93/&IO_2A_AN39/DIFFIO_RX_L45P/DIFFOUT_L89P!-IO_2A_AP34/DQ32L/DIFFIO_TX_L51N/DIFFOUT_L102N!,IO_2A_AP35/DQ29L/DIFFIO_TX_L47P/DIFFOUT_L94P!/,IO_2A_AP36/DQ29L/DIFFIO_TX_L47N/DIFFOUT_L94N!93#,IO_2A_AP37/DQ31L/DIFFIO_RX_L50N/DIFFOUT_L99N!.IO_2A_AP39/DQSN28L/DIFFIO_RX_L46N/DIFFOUT_L91N!-IO_2A_AR34/DQ32L/DIFFIO_TX_L51P/DIFFOUT_L102P!#-IO_2A_AR35/DQ33L/DIFFIO_TX_L53P/DIFFOUT_L106P!#,IO_2A_AR37/DQ31L/DIFFIO_RX_L50P/DIFFOUT_L99P""!#-IO_2A_AR39/DQS28L/DIFFIO_RX_L46P/DIFFOUT_L91P,,!#-IO_2A_AT34/DQ34L/DIFFIO_TX_L54N/DIFFOUT_L108N66!t-IO_2A_AT36/DQ33L/DIFFIO_TX_L53N/DIFFOUT_L106N@@!#.IO_2A_AT37/DQS31L/DIFFIO_RX_L51P/DIFFOUT_L101PJJ!#/IO_2A_AT38/DQSN31L/DIFFIO_RX_L51N/DIFFOUT_L101NTT!#.IO_2A_AT39/DQSN30L/DIFFIO_RX_L49N/DIFFOUT_L97N^^!#-IO_2A_AU34/DQ34L/DIFFIO_TX_L54P/DIFFOUT_L108Phh!#-IO_2A_AU35/DQ34L/DIFFIO_TX_L55N/DIFFOUT_L110Nrr!#.IO_2A_AU36/DQS32L/DIFFIO_RX_L52P/DIFFOUT_L103P||!#/IO_2A_AU37/DQSN32L/DIFFIO_RX_L52N/DIFFOUT_L103N!#-IO_2A_AU39/DQS30L/DIFFIO_RX_L49P/DIFFOUT_L97P!#-IO_2A_AV35/DQ34L/DIFFIO_TX_L55P/DIFFOUT_L110P!#.IO_2A_AV37/DQS34L/DIFFIO_RX_L55P/DIFFOUT_L109P!#/IO_2A_AV38/DQSN34L/DIFFIO_RX_L55N/DIFFOUT_L109N!se#-IO_2A_AW36/DQ33L/DIFFIO_RX_L53P/DIFFOUT_L105P!#-IO_2A_AW37/DQ33L/DIFFIO_RX_L53N/DIFFOUT_L105N!#,IO_2B_AF30/DQ27L/DIFFIO_TX_L44P/DIFFOUT_L88Pl  !##,IO_2B_AG31/DQ27L/DIFFIO_TX_L44N/DIFFOUT_L88Nl!,IO_2B_AG32/DQ27L/DIFFIO_TX_L43N/DIFFOUT_L86Nl!#t,IO_2B_AH31/DQ27L/DIFFIO_TX_L43P/DIFFOUT_L86Pl((!##)IO_2B_AJ39***/DIFFIO_RX_L40P/DIFFOUT_L79Pl22!#2-IO_2B_AK38/DQS26L/DIFFIO_RX_L43P/DIFFOUT_L85Pl<<!##.IO_2B_AK39/DQSN26L/DIFFIO_RX_L43N/DIFFOUT_L85NlFF!##/IO_2B_AL35***/DQ26L/DIFFIO_TX_L42P/DIFFOUT_L84PlPP!-IO_2B_AL36/DQS27L/DIFFIO_RX_L44P/DIFFOUT_L87PlZZ!##0IO_2B_AL39***/DQS25L/DIFFIO_RX_L41P/DIFFOUT_L81Pldd!.IO_2B_AM37/DQSN27L/DIFFIO_RX_L44N/DIFFOUT_L87Nlnn!,IO_2B_AM38/DQ26L/DIFFIO_RX_L42P/DIFFOUT_L83Plxx!93eme,IO_2B_AM39/DQ26L/DIFFIO_RX_L42N/DIFFOUT_L83Nl!#,IO_2C_AA38/DQ18L/DIFFIO_RX_L30P/DIFFOUT_L59Pl!.IO_2C_AA39/DQSN18L/DIFFIO_RX_L31N/DIFFOUT_L61Nl!#_AB-IO_2C_AB39/DQS18L/DIFFIO_RX_L31P/DIFFOUT_L61Pl!.IO_2C_AC38/DQSN21L/DIFFIO_RX_L35N/DIFFOUT_L69Nl!,IO_2C_AD29/DQ23L/DIFFIO_TX_L37P/DIFFOUT_L74Pl!,IO_2C_AD30/DQ23L/DIFFIO_TX_L37N/DIFFOUT_L74Nl!-IO_2C_AD38/DQS21L/DIFFIO_RX_L35P/DIFFOUT_L69Pl!#,IO_2C_AE30/DQ23L/DIFFIO_TX_L38P/DIFFOUT_L76Pl!,IO_2C_AE31/DQ23L/DIFFIO_TX_L38N/DIFFOUT_L76Nl!0IO_2C_AE39***/DQS20L/DIFFIO_RX_L34P/DIFFOUT_L67Pl!,IO_2C_AF32/DQ21L/DIFFIO_TX_L35P/DIFFOUT_L70Pl!,IO_2C_AF38/DQ19L/DIFFIO_TX_L32N/DIFFOUT_L64Nl!.IO_2C_AF39/DQSN22L/DIFFIO_RX_L37N/DIFFOUT_L73Nl!.IO_2C_AG38/DQSN23L/DIFFIO_RX_L38N/DIFFOUT_L75Nl!-IO_2C_AG39/DQS22L/DIFFIO_RX_L37P/DIFFOUT_L73Pl""!,IO_2C_AH39/DQ22L/DIFFIO_RX_L36P/DIFFOUT_L71Pl,,!#+IO_2C_W38/DQ20L/DIFFIO_RX_L33N/DIFFOUT_L65Nl66!93+IO_2C_Y38/DQ18L/DIFFIO_RX_L30N/DIFFOUT_L59Nl@@!/IO_2C_Y39***/DQS19L/DIFFIO_RX_L32P/DIFFOUT_L63PlJJ!##'0CPEP4S100G5ES1F1932-11EP4S100G5ES1F1932-11.NormalEP4S100G5ES1F1932-11.Normal0(.p$T^EP4S100G5ES1F1932 (For ES1 silicon only) VERSION : 1.0 PAGE : 11 of 14 DATE : JUNE 2009 ."B<T:Note : 1) Pins with this symbol (**) can only be used in configuration mode. These pins can not be used as user I/O pins after configuration but only the RUP /RDN feature still available for package 1932. Please refer pin-out for more details. 4IO_1C_AA33**/DQ16L/DIFFIO_TX_L25N/DIFFOUT_L49N/DATA0 !1IO_1C_Y32/DQ16L/DIFFIO_TX_L25P/DIFFOUT_L49P/DATA1!3IO_1C_P38/DQSN16L/DIFFIO_RX_L25N/DIFFOUT_L50N/DATA2!-4IO_1C_P37**/DQS16L/DIFFIO_RX_L25P/DIFFOUT_L50P/DATA3((!ame1IO_1C_U38/DQ16L/DIFFIO_TX_L26N/DIFFOUT_L51N/DATA422!3IO_1C_U37**/DQ16L/DIFFIO_TX_L26P/DIFFOUT_L51P/DATA5<<!5IO_1C_R40**/DQSN17L/DIFFIO_RX_L26N/DIFFOUT_L52N/DATA6FF!93Z2IO_1C_P39/DQS17L/DIFFIO_RX_L26P/DIFFOUT_L52P/DATA7PP!4IO_1C_V37**/DQ15L/DIFFIO_TX_L24N/DIFFOUT_L47N/CLKUSRdd!6IO_1C_AA31/DQ17L/DIFFIO_TX_L27P/DIFFOUT_L53P/CRC_ERRORnn!2IO_1C_R39/DQ17L/DIFFIO_RX_L27N/DIFFOUT_L54N/DEV_OExx!Y4IO_1C_T39/DQ17L/DIFFIO_RX_L27P/DIFFOUT_L54P/DEV_CLRN!5IO_1C_Y31/DQ17L/DIFFIO_TX_L27N/DIFFOUT_L53N/INIT_DONE!93ASDO  ! CONF_DONE!-DCLK!-MSEL0((!YMSEL122!MSEL2<<!NCEFF!NCEOPP!YNCONFIGZZ!93[NCSOdd! NIO_PULLUPnn!NSTATUSxx!-PORSEL!TCK!TDI!-TDO!TMS!TRST!'0PEP4S100G5ES1F1932-4EP4S100G5ES1F1932-4.NormalEP4S100G5ES1F1932-4.Normal0(4.4pz]EP4S100G5ES1F1932 (For ES1 silicon only) VERSION : 1.0 PAGE : 4 of 14 DATE : JUNE 2009 4|'IO_3C_AM24/PLL_B1_CLKOUT0N/DIFFOUT_B61N !'IO_3C_AL23/PLL_B1_CLKOUT0P/DIFFOUT_B61P!9IO_3C_AM23/PLL_B1_FBP/CLKOUT1/DIFFIO_RX_B31P/DIFFOUT_B62P!9IO_3C_AN23/PLL_B1_FBN/CLKOUT2/DIFFIO_RX_B31N/DIFFOUT_B62N((!&IO_3C_AN24/PLL_B1_CLKOUT3/DIFFOUT_B59P22!&IO_3C_AM25/PLL_B1_CLKOUT4/DIFFOUT_B59N<<!&RDN3A/DIFFIO_RX_B1N/DIFFOUT_B2N/DQSN1BPP!nd%RUP3A/DIFFIO_RX_B1P/DIFFOUT_B2P/DQS1BZZ!e)RDN3C/DIFFIO_RX_B25N/DIFFOUT_B50N/DQSN17Bdd!(RUP3C/DIFFIO_RX_B25P/DIFFOUT_B50P/DQS17Bnn!+IO_3A_AK28/DQ8B/DIFFIO_RX_B12P/DIFFOUT_B24P!1IO_3A_AK29/DQ8B/DIFFOUT_B23N!#IO_3A_AK30/DQ8B/DIFFOUT_B23P!#+IO_3A_AL28/DQ8B/DIFFIO_RX_B12N/DIFFOUT_B24N!,IO_3A_AL29/DQS8B/DIFFIO_RX_B11P/DIFFOUT_B22P!IO_3A_AL32/DQ7B/DIFFOUT_B21N!-IO_3A_AM29/DQSN8B/DIFFIO_RX_B11N/DIFFOUT_B22N!IO_3A_AM30/DQ7B/DIFFOUT_B19N!ACIO_3A_AM31/DQ7B/DIFFOUT_B19P!IO_3A_AN29/DQ7B/DIFFOUT_B21P!,IO_3A_AN30/DQS7B/DIFFIO_RX_B10P/DIFFOUT_B20P!_AB-IO_3A_AN31/DQSN7B/DIFFIO_RX_B10N/DIFFOUT_B20N!#*IO_3A_AR30/DQ6B/DIFFIO_RX_B9P/DIFFOUT_B18P!t +IO_3A_AR31/DQS6B/DIFFIO_RX_B8P/DIFFOUT_B16P!,IO_3A_AR32/DQSN6B/DIFFIO_RX_B8N/DIFFOUT_B16N!#*IO_3A_AT30/DQ6B/DIFFIO_RX_B9N/DIFFOUT_B18N!IO_3A_AT31/DQ6B/DIFFOUT_B17N""!IO_3A_AT32/DQ5B/DIFFOUT_B13P,,!IO_3A_AT33/DQ5B/DIFFOUT_B13N66!IO_3A_AU31/DQ6B/DIFFOUT_B17P@@!IO_3A_AU32/DQ5B/DIFFOUT_B15NJJ!*IO_3A_AV31/DQ4B/DIFFIO_RX_B6P/DIFFOUT_B12PTT!IO_3A_AV32/DQ5B/DIFFOUT_B15P^^!+IO_3A_AV33/DQS5B/DIFFIO_RX_B7P/DIFFOUT_B14Phh!,IO_3A_AV34/DQSN5B/DIFFIO_RX_B7N/DIFFOUT_B14Nrr!*IO_3A_AW31/DQ4B/DIFFIO_RX_B6N/DIFFOUT_B12N||!IO_3A_AW33/DQ3B/DIFFOUT_B9N!931IO_3A_AW34/DQ3B/DIFFOUT_B7N!+IO_3A_AY31/DQS4B/DIFFIO_RX_B5P/DIFFOUT_B10P!IO_3A_AY32/DQ4B/DIFFOUT_B11P!*IO_3A_AY34/DQS3B/DIFFIO_RX_B4P/DIFFOUT_B8P!,IO_3A_BA31/DQSN4B/DIFFIO_RX_B5N/DIFFOUT_B10N!T_1IO_3A_BA32/DQ4B/DIFFOUT_B11N!IO_3A_BA33/DQ3B/DIFFOUT_B7P!+IO_3A_BA34/DQSN3B/DIFFIO_RX_B4N/DIFFOUT_B8N!#IO_3A_BB31/DQ2B/DIFFOUT_B5P!##IO_3A_BB32/DQ2B/DIFFOUT_B5N!IO_3A_BB33/DQ3B/DIFFOUT_B9P!IO_3A_BB35/DQ1B/DIFFOUT_B1N!)IO_3A_BC31/DQ2B/DIFFIO_RX_B3P/DIFFOUT_B6P!*IO_3A_BC32/DQS2B/DIFFIO_RX_B2P/DIFFOUT_B4P!IO_3A_BC35/DQ1B/DIFFOUT_B1P!)IO_3A_BD31/DQ2B/DIFFIO_RX_B3N/DIFFOUT_B6N&&!#+IO_3A_BD32/DQSN2B/DIFFIO_RX_B2N/DIFFOUT_B4N00!IO_3A_BD33/DQ1B/DIFFOUT_B3P::!IO_3A_BD34/DQ1B/DIFFOUT_B3NDD!&IO_3C_AP25/DIFFIO_RX_B29P/DIFFOUT_B58PXX!&IO_3C_AR25/DIFFIO_RX_B29N/DIFFOUT_B58Nbb!IO_3C_AT23/DQ19B/DIFFOUT_B57Nll!#&IO_3C_AT24/DIFFIO_RX_B30P/DIFFOUT_B60Pvv!93#&IO_3C_AT25/DIFFIO_RX_B30N/DIFFOUT_B60N!IO_3C_AU23/DQ19B/DIFFOUT_B57P!IO_3C_AV23/DQ19B/DIFFOUT_B55P!#-IO_3C_AV24/DQS19B/DIFFIO_RX_B28P/DIFFOUT_B56P!#.IO_3C_AV25/DQSN19B/DIFFIO_RX_B28N/DIFFOUT_B56N!IO_3C_AW23/DQ19B/DIFFOUT_B55N!IO_3C_AW24/DQ17B/DIFFOUT_B51P!IO_3C_AW25/DQ17B/DIFFOUT_B49P!IO_3C_AY23/DQ18B/DIFFOUT_B53P!IO_3C_BA23/DQ18B/DIFFOUT_B53N!rIO_3C_BA24/DQ17B/DIFFOUT_B51N!,IO_3C_BB23/DQ18B/DIFFIO_RX_B27P/DIFFOUT_B54P!IO_3C_BB25/DQ17B/DIFFOUT_B49N!,IO_3C_BC23/DQ18B/DIFFIO_RX_B27N/DIFFOUT_B54N!#-IO_3C_BD23/DQS18B/DIFFIO_RX_B26P/DIFFOUT_B52P  !93#.IO_3C_BD24/DQSN18B/DIFFIO_RX_B26N/DIFFOUT_B52N!-IO_3B_AK26/DQS16B/DIFFIO_RX_B23P/DIFFOUT_B46P 4 !.IO_3B_AK27/DQSN16B/DIFFIO_RX_B23N/DIFFOUT_B46N4!IO_3B_AL26/DQ16B/DIFFOUT_B47P4!,IO_3B_AM26/DQ16B/DIFFIO_RX_B24P/DIFFOUT_B48P(4(!IO_3B_AM27/DQ16B/DIFFOUT_B47N242!IO_3B_AM28/DQ15B/DIFFOUT_B45N<4<!,IO_3B_AN26/DQ16B/DIFFIO_RX_B24N/DIFFOUT_B48NF4F!IO_3B_AN28/DQ15B/DIFFOUT_B43NP4P!#-IO_3B_AP28/DQS15B/DIFFIO_RX_B22P/DIFFOUT_B44PZ4Z!##IO_3B_AR26/DQ15B/DIFFOUT_B45Pd4d!#IO_3B_AR27/DQ15B/DIFFOUT_B43Pn4n!.IO_3B_AR28/DQSN15B/DIFFIO_RX_B22N/DIFFOUT_B44Nx4x!IO_3B_AR29/DQ13B/DIFFOUT_B37P4!etIO_3B_AT26/DQ14B/DIFFOUT_B41P4!0%IO_3B_AT29/DQ13B/DIFFOUT_B37N4!`%,IO_3B_AU26/DQ14B/DIFFIO_RX_B21P/DIFFOUT_B42P4!z%IO_3B_AU27/DQ14B/DIFFOUT_B41N4!IO_3B_AU28/DQ13B/DIFFOUT_B39N4!{%-IO_3B_AU29/DQS13B/DIFFIO_RX_B19P/DIFFOUT_B38P4!c,IO_3B_AV26/DQ14B/DIFFIO_RX_B21N/DIFFOUT_B42N4!93x%-IO_3B_AV27/DQS14B/DIFFIO_RX_B20P/DIFFOUT_B40P4!IO_3B_AV28/DQ13B/DIFFOUT_B39P4!%c.IO_3B_AV29/DQSN13B/DIFFIO_RX_B19N/DIFFOUT_B38N4!#IO_3B_AW26/DQ12B/DIFFOUT_B35P4!.IO_3B_AW28/DQSN14B/DIFFIO_RX_B20N/DIFFOUT_B40N4!937IO_3B_AW29/DQ11B/DIFFOUT_B33N4!IO_3B_AW30/DQ11B/DIFFOUT_B33P4!IO_3B_AY26/DQ12B/DIFFOUT_B35N4!#IO_3B_AY28/DQ11B/DIFFOUT_B31P"4"!IO_3B_AY29/DQ11B/DIFFOUT_B31N,4,!,IO_3B_BA26/DQ12B/DIFFIO_RX_B18P/DIFFOUT_B36P646!93,IO_3B_BA27/DQ12B/DIFFIO_RX_B18N/DIFFOUT_B36N@4@!-IO_3B_BA28/DQS12B/DIFFIO_RX_B17P/DIFFOUT_B34PJ4J!%\%-IO_3B_BA29/DQS11B/DIFFIO_RX_B16P/DIFFOUT_B32PT4T!##.IO_3B_BA30/DQSN11B/DIFFIO_RX_B16N/DIFFOUT_B32N^4^!93#IO_3B_BB26/DQ10B/DIFFOUT_B29Ph4h!.IO_3B_BB28/DQSN12B/DIFFIO_RX_B17N/DIFFOUT_B34Nr4r!,IO_3B_BB30/DQS9B/DIFFIO_RX_B13P/DIFFOUT_B26P|4|!,IO_3B_BC25/DQ10B/DIFFIO_RX_B15P/DIFFOUT_B30P4!IO_3B_BC26/DQ10B/DIFFOUT_B29N4!IO_3B_BC28/DQ9B/DIFFOUT_B27P4!-IO_3B_BC29/DQSN9B/DIFFIO_RX_B13N/DIFFOUT_B26N4!,IO_3B_BD25/DQ10B/DIFFIO_RX_B15N/DIFFOUT_B30N4!-IO_3B_BD26/DQS10B/DIFFIO_RX_B14P/DIFFOUT_B28P4!.IO_3B_BD27/DQSN10B/DIFFIO_RX_B14N/DIFFOUT_B28N4!IO_3B_BD28/DQ9B/DIFFOUT_B27N4!IO_3B_BD29/DQ9B/DIFFOUT_B25P4!IO_3B_BD30/DQ9B/DIFFOUT_B25N4!'0PEP4S100G5ES1F1932-12EP4S100G5ES1F1932-12.NormalEP4S100G5ES1F1932-12.Normal0(.pT^EP4S100G5ES1F1932 (For ES1 silicon only) VERSION : 1.0 PAGE : 12 of 14 DATE : JUNE 2009 .BTBNote : 1) Pins with this symbol (**) can only be used in configuration mode. These pins can not be used as user I/O pins after configuration but only the RUP /RDN feature still available for package 1932. Please refer pin-out for more details. NC_A10 !NC_A35!NC_AA12!NC_AA16((!LNC_AA3622!NC_AA37<<!NC_AA40FF!93ameNC_AA5PP!-NC_AA8ZZ!NC_AA9dd!NC_AB10nn!NC_AB11xx!NC_AB29!--NC_AB36!YNC_AB37!-NC_AB8!linNC_AB9!ZNC_AC16!-NC_AC37!-NC_AC39!NC_AC40!eNC_AC5!-NC_AC6!93NC_AC8!NC_AE33!NC_AE36!NC_AE40!NC_AE5!NC_AE8""!NC_AE9,,!NC_AF1066!NC_AF11@@!NC_AF12JJ!NC_AF29TT!NC_AF33^^!NC_AF34hh!93NC_AF35rr!NC_AF36||!NC_AF37!NC_AF8!NC_AF9!NC_AG33!NC_AG40!-NC_AG5!NC_AG8!NC_AH12!NC_AH37!NC_AH8!NC_AJ12!NC_AJ26!atNC_AJ28!tNC_AJ33!NC_AJ36!NC_AJ37!NC_AJ40&&!YNC_AJ500!NC_AJ8::!NC_AJ9DD!NC_AK10NN!NC_AK11XX!--NC_AK12bb!-NC_AK33ll!NC_AK34vv!-NC_AK35!NC_AK36!NC_AK8!NC_AK9!-NC_AL40!NC_AL5!NC_AN40!NC_AN5!93NC_AR40!NC_AR5!NC_AT40!NC_AT5!NC_AU40!-NC_AU5!NC_AV40  !NC_AV5!NC_AW11  !NC_AW39**!NC_AW4044!-NC_AW5>>!NC_AW6HH!NC_BA35RR!NC_J40"!NC_J5"!NC_K40"!NC_K5"!NC_L40"!-NC_L5"!NC_M40"!NC_M5"!NC_N40"!NC_N5"!NC_P10"!NC_P11"!NC_P34"!NC_P35"!-NC_P36"!-NC_P8"!NC_P9"""!NC_R12,",!NC_R336"6!NC_R37@"@!NC_R5J"J!NC_R8T"T!NC_T33^"^!NC_U12h"h!NC_U33r"r!NC_U36|"|!NC_U39"!NC_U40"!NC_U5"!NC_U8"!lt NC_U9"! NC_V10"!NC_V11"!eouNC_V12"!NC_V34"!NC_V35"!NC_V36"!NC_V6"! NC_V8"!NC_V9"!cNC_W12"!93NC_W16"!NC_W33&"&!93NC_W370"0!NC_Y12:":!NC_Y29D"D!NC_Y37N"N!--NC_Y8X"X!DNUl"l! TEMPDIODEN"! TEMPDIODEP"!NC_E38 " !93NC_E39"!8NC_E40"!939NC_E5("(!93G-NC_E62"2!93hNC_E7<"<!gNC_E8F"F!93NC_F40P"P!93NC_G40Z"Z!93NC_G5d"d!930NC_H40n"n!93NC_H5x"x!930'0PPEP4S100G5ES1F1932-5EP4S100G5ES1F1932-5.NormalEP4S100G5ES1F1932-5.Normal0( 4.4pz]EP4S100G5ES1F1932 (For ES1 silicon only) VERSION : 1.0 PAGE : 5 of 14 DATE : JUNE 2009 4|'IO_4C_AU22/PLL_B2_CLKOUT0P/DIFFOUT_B68P !'IO_4C_AV22/PLL_B2_CLKOUT0N/DIFFOUT_B68N!9IO_4C_AM21/PLL_B2_FBP/CLKOUT1/DIFFIO_RX_B34P/DIFFOUT_B67P!9IO_4C_AM22/PLL_B2_FBN/CLKOUT2/DIFFIO_RX_B34N/DIFFOUT_B67N((!c&IO_4C_AT21/PLL_B2_CLKOUT3/DIFFOUT_B70P22!&IO_4C_AR20/PLL_B2_CLKOUT4/DIFFOUT_B70N<<!)RUP4A/DIFFIO_RX_B64P/DIFFOUT_B127P/DQS38BPP!*RDN4A/DIFFIO_RX_B64N/DIFFOUT_B127N/DQSN38BZZ!IO_4A_AJ16/DQ32B/DIFFOUT_B108Nnn!-IO_4A_AJ18/DQ31B/DIFFIO_RX_B53P/DIFFOUT_B105Pxx!linIO_4A_AK15/DQ32B/DIFFOUT_B110N!G%IO_4A_AK16/DQ32B/DIFFOUT_B108P!93.IO_4A_AK17/DQS31B/DIFFIO_RX_B54P/DIFFOUT_B107P!-IO_4A_AK18/DQ31B/DIFFIO_RX_B53N/DIFFOUT_B105N!IO_4A_AL14/DQ32B/DIFFOUT_B110P!E%/IO_4A_AL17/DQSN31B/DIFFIO_RX_B54N/DIFFOUT_B107N!lt .IO_4A_AM14/DQS32B/DIFFIO_RX_B55P/DIFFOUT_B109P!/IO_4A_AM15/DQSN32B/DIFFIO_RX_B55N/DIFFOUT_B109N!IO_4A_AM16/DQ31B/DIFFOUT_B106P!IO_4A_AM17/DQ31B/DIFFOUT_B106N!IO_4A_AN14/DQ34B/DIFFOUT_B116N!ttIO_4A_AN15/DQ34B/DIFFOUT_B116P!937.IO_4A_AP16/DQS34B/DIFFIO_RX_B58P/DIFFOUT_B115P!IO_4A_AR13/DQ34B/DIFFOUT_B114N!IO_4A_AR14/DQ34B/DIFFOUT_B114P!%/IO_4A_AR15/DQSN34B/DIFFIO_RX_B58N/DIFFOUT_B115N!.IO_4A_AT12/DQS33B/DIFFIO_RX_B57P/DIFFOUT_B113P""!/IO_4A_AT13/DQSN33B/DIFFIO_RX_B57N/DIFFOUT_B113N,,!IO_4A_AT14/DQ33B/DIFFOUT_B112P66!IO_4A_AU13/DQ33B/DIFFOUT_B112N@@!-IO_4A_AU14/DQ33B/DIFFIO_RX_B56P/DIFFOUT_B111PJJ!IO_4A_AV12/DQ36B/DIFFOUT_B122PTT!IO_4A_AV13/DQ36B/DIFFOUT_B120P^^!IO_4A_AV14/DQ35B/DIFFOUT_B118Phh!-IO_4A_AV15/DQ33B/DIFFIO_RX_B56N/DIFFOUT_B111Nrr!.IO_4A_AW12/DQS36B/DIFFIO_RX_B61P/DIFFOUT_B121P||!IO_4A_AW14/DQ35B/DIFFOUT_B118N!937/IO_4A_AY11/DQSN36B/DIFFIO_RX_B61N/DIFFOUT_B121N!.IO_4A_AY13/DQS35B/DIFFIO_RX_B60P/DIFFOUT_B119P!-IO_4A_AY14/DQ35B/DIFFIO_RX_B59P/DIFFOUT_B117P!IO_4A_BA10/DQ38B/DIFFOUT_B128P!IO_4A_BA11/DQ36B/DIFFOUT_B122N!IO_4A_BA12/DQ36B/DIFFOUT_B120N!/IO_4A_BA13/DQSN35B/DIFFIO_RX_B60N/DIFFOUT_B119N!-IO_4A_BA14/DQ35B/DIFFIO_RX_B59N/DIFFOUT_B117N!%IO_4A_BB10/DQ38B/DIFFOUT_B128N!IO_4A_BB12/DQ37B/DIFFOUT_B124P!IO_4A_BB13/DQ37B/DIFFOUT_B124N!-IO_4A_BB14/DQ37B/DIFFIO_RX_B62P/DIFFOUT_B123P!-IO_4A_BC13/DQ37B/DIFFIO_RX_B62N/DIFFOUT_B123N!IO_4A_BD10/DQ38B/DIFFOUT_B126P!IO_4A_BD11/DQ38B/DIFFOUT_B126N!.IO_4A_BD12/DQS37B/DIFFIO_RX_B63P/DIFFOUT_B125P&&!/IO_4A_BD13/DQSN37B/DIFFIO_RX_B63N/DIFFOUT_B125N00! &IO_4C_AN20/DIFFIO_RX_B36P/DIFFOUT_B71PDD!&IO_4C_AP20/DIFFIO_RX_B36N/DIFFOUT_B71NNN!&IO_4C_AT20/DIFFIO_RX_B35P/DIFFOUT_B69PXX!7&IO_4C_AU20/DIFFIO_RX_B35N/DIFFOUT_B69Nbb!IO_4C_AV20/DQ22B/DIFFOUT_B80Pll!-IO_4C_AW20/DQS22B/DIFFIO_RX_B40P/DIFFOUT_B79Pvv!IO_4C_AW21/DQ22B/DIFFOUT_B80N!IO_4C_AW22/DQ22B/DIFFOUT_B78N!.IO_4C_AY20/DQSN22B/DIFFIO_RX_B40N/DIFFOUT_B79N!IO_4C_AY22/DQ22B/DIFFOUT_B78P!%IO_4C_BA20/DQ21B/DIFFOUT_B76P!IO_4C_BA22/DQ20B/DIFFOUT_B72P!IO_4C_BB20/DQ21B/DIFFOUT_B76N!IO_4C_BB21/DQ20B/DIFFOUT_B74P!IO_4C_BB22/DQ20B/DIFFOUT_B72N!-IO_4C_BC19/DQS21B/DIFFIO_RX_B39P/DIFFOUT_B77P!,IO_4C_BC20/DQ21B/DIFFIO_RX_B38P/DIFFOUT_B75P!%IO_4C_BC22/DQ20B/DIFFOUT_B74N!.IO_4C_BD19/DQSN21B/DIFFIO_RX_B39N/DIFFOUT_B77N!,IO_4C_BD20/DQ21B/DIFFIO_RX_B38N/DIFFOUT_B75N!%-IO_4C_BD21/DQS20B/DIFFIO_RX_B37P/DIFFOUT_B73P  !%.IO_4C_BD22/DQSN20B/DIFFIO_RX_B37N/DIFFOUT_B73N!IO_4B_AJ20/DQ24B/DIFFOUT_B86N  * !IO_4B_AK20/DQ24B/DIFFOUT_B84P *!IO_4B_AL19/DQ24B/DIFFOUT_B86P *!%IO_4B_AL20/DQ24B/DIFFOUT_B84N (*(!IO_4B_AM18/DQ23B/DIFFOUT_B82P 2*2!-IO_4B_AM19/DQS24B/DIFFIO_RX_B43P/DIFFOUT_B85P <*<!.IO_4B_AM20/DQSN24B/DIFFIO_RX_B43N/DIFFOUT_B85N F*F!-IO_4B_AN17/DQS23B/DIFFIO_RX_B42P/DIFFOUT_B83P P*P!%IO_4B_AN18/DQ23B/DIFFOUT_B82N Z*Z!,IO_4B_AN19/DQ23B/DIFFIO_RX_B41P/DIFFOUT_B81P d*d!.IO_4B_AP17/DQSN23B/DIFFIO_RX_B42N/DIFFOUT_B83N n*n!,IO_4B_AP19/DQ23B/DIFFIO_RX_B41N/DIFFOUT_B81N x*x!IO_4B_AR16/DQ26B/DIFFOUT_B92P *!-IO_4B_AR19/DQS25B/DIFFIO_RX_B45P/DIFFOUT_B89P *!IO_4B_AT16/DQ26B/DIFFOUT_B92N *!IO_4B_AT17/DQ26B/DIFFOUT_B90P *!.IO_4B_AT18/DQSN25B/DIFFIO_RX_B45N/DIFFOUT_B89N *!IO_4B_AT19/DQ25B/DIFFOUT_B88P *!%-IO_4B_AU16/DQS26B/DIFFIO_RX_B46P/DIFFOUT_B91P *!IO_4B_AU17/DQ26B/DIFFOUT_B90N *!%%IO_4B_AU19/DQ25B/DIFFOUT_B88N *!93%.IO_4B_AV16/DQSN26B/DIFFIO_RX_B46N/DIFFOUT_B91N *!,IO_4B_AV18/DQ25B/DIFFIO_RX_B44P/DIFFOUT_B87P *!,IO_4B_AV19/DQ25B/DIFFIO_RX_B44N/DIFFOUT_B87N *!IO_4B_AW15/DQ28B/DIFFOUT_B98P *!IO_4B_AW16/DQ28B/DIFFOUT_B98N *!-IO_4B_AW17/DQS27B/DIFFIO_RX_B48P/DIFFOUT_B95P *!.IO_4B_AW18/DQSN27B/DIFFIO_RX_B48N/DIFFOUT_B95N *!93!%IO_4B_AW19/DQ27B/DIFFOUT_B94P "*"!-IO_4B_AY16/DQS28B/DIFFIO_RX_B49P/DIFFOUT_B97P ,*,!.IO_4B_AY17/DQSN28B/DIFFIO_RX_B49N/DIFFOUT_B97N 6*6!93!%IO_4B_AY19/DQ27B/DIFFOUT_B94N @*@!IO_4B_BA15/DQ28B/DIFFOUT_B96P J*J!IO_4B_BA16/DQ28B/DIFFOUT_B96N T*T!93IO_4B_BA17/DQ29B/DIFFOUT_B100N ^*^!,IO_4B_BA18/DQ27B/DIFFIO_RX_B47P/DIFFOUT_B93P h*h!,IO_4B_BA19/DQ27B/DIFFIO_RX_B47N/DIFFOUT_B93N r*r!IO_4B_BB15/DQ30B/DIFFOUT_B102P |*|!IO_4B_BB17/DQ29B/DIFFOUT_B100P *!,IO_4B_BB18/DQ29B/DIFFIO_RX_B50P/DIFFOUT_B99P *!IO_4B_BC14/DQ30B/DIFFOUT_B104P *!IO_4B_BC16/DQ30B/DIFFOUT_B102N *!,IO_4B_BC17/DQ29B/DIFFIO_RX_B50N/DIFFOUT_B99N *!IO_4B_BD14/DQ30B/DIFFOUT_B104N *!.IO_4B_BD15/DQS30B/DIFFIO_RX_B52P/DIFFOUT_B103P *!%%/IO_4B_BD16/DQSN30B/DIFFIO_RX_B52N/DIFFOUT_B103N *!93 %.IO_4B_BD17/DQS29B/DIFFIO_RX_B51P/DIFFOUT_B101P *!/IO_4B_BD18/DQSN29B/DIFFIO_RX_B51N/DIFFOUT_B101N *!'0PEP4S100G5ES1F1932-13EP4S100G5ES1F1932-13.NormalEP4S100G5ES1F1932-13.Normal0(d . pl 0` 09^EP4S100G5ES1F1932 (For ES1 silicon only) VERSION : 1.0 PAGE : 13 of 14 DATE : JUNE 2009 d GND !GND!GND!GND((!GND22!GND<<!GNDFF!93*GNDPP!-GNDZZ!GNDdd!GNDnn!GNDxx!--GND!--GND!93GND!GND!GND!--GND!GND!--GND!93-GND!GND!GND!93tGND!GND!GND!GND!GND!GND""!GND,,!GND66!GND@@!GNDJJ!GNDTT!GND^^!GNDhh!GNDrr!GND||!GND!93GND!GND!GND!GND!GND!GND!GND!GND!93GND!GND!GND!GND!GND!GND!GND!93GND&&!GND00!GND::!GNDDD!GNDNN!GNDXX!GNDbb!GNDll!GNDvv!GND!GND!GND!93ttGND!GND!GND!GND!GND!GND!GND!93GND!GND!GND!GND!GND  !GND!GND  !GND**!GND44!GND>>!GNDHH!GNDRR!GND\\!GNDff!GNDpp!GNDzz!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!93GND!GND!GND!GND$$!GND..!rGND88!GNDBB!GNDLL!GNDVV!GND``!GNDjj!GNDtt!GND~~!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!gGND! GND  !{GND!GND!QGND((!GND22!]GND<<!^GNDFF!]GNDPP!TGNDZZ!jGNDdd!JGNDnn!uGNDxx!\GND!t GND!]GND!|GND!GND!GND!xGND!ameGND!GND!B/UT_GND!GND!GND!GND!GND!GND!GND!GND""!GND,,!GND66!GND@@!zGNDJJ!93GNDTT!GND^^!GNDhh!GNDrr!GND||!93_GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND&&!GND00!GND::!GNDDD!GNDNN!GNDXX!GNDbb!GNDll!GNDvv!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND  !GND!93RGND  !GND**!GND44!GND>>!GNDHH!GNDRR!GND\\!GNDff!AMGNDpp!GNDzz!GND!.GND!93GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GND!GNDd !GNDd!GNDd!GNDd((!GNDd22!GNDd<<!GNDdFF!wGNDdPP!GNDdZZ!GNDddd!GNDdnn!93GNDdxx!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!93GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd""!GNDd,,!GNDd66!GNDd@@!GNDdJJ!GNDdTT!GNDd^^!GNDdhh!GNDdrr!GNDd||!GNDd!GNDd!93 GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd&&!GNDd00!GNDd::!GNDdDD!GNDdNN!GNDdXX!GNDdbb!GNDdll!GNDdvv!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd  !GNDd!GNDd  !GNDd**!GNDd44!GNDd>>!GNDdHH!GNDdRR!GNDd\\!GNDdff!GNDdpp!GNDdzz!GNDd!GNDd!GNDd!OGNDd!seOGNDd!NGNDd!cGNDd!GNDd!cGNDd!GNDd!NGNDd!GNDd!GNDd!GNDd!93:GNDd!:GNDd!,GNDd$$!=GNDd..!?GNDd88!GNDdBB!ciGNDdLL!GNDdVV!GNDd``!GNDdjj!GNDdtt!GNDd~~!GNDd!_GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd  !GNDd!GNDd!GNDd((!GNDd22!GNDd<<!GNDdFF!GNDdPP!GNDdZZ!GNDddd!GNDdnn!GNDdxx!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!93'GNDd!GNDd""!GNDd,,!GNDd66!GNDd@@!GNDdJJ!GNDdTT!93GNDd^^!GNDdhh!GNDdrr!GNDd||!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd&&!GNDd00!GNDd::!GNDdDD!GNDdNN!GNDdXX!GNDdbb!GNDdll!GNDdvv!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd  !GNDd!GNDd  !tGNDd**!GNDd44!GNDd>>!GNDdHH!GNDdRR!GNDd\\!GNDdff!GNDdpp!GNDdzz!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!GNDd!'0dPEP4S100G5ES1F1932-6EP4S100G5ES1F1932-6.NormalEP4S100G5ES1F1932-6.Normal0(b.pF,b]EP4S100G5ES1F1932 (For ES1 silicon only) VERSION : 1.0 PAGE : 6 of 14 DATE : JUNE 2009 .bB|,Note : 2) Pins with this symbol (**) can only be used in configuration mode. These pins can not be used as user I/O pins after configuration but only the RUP /RDN feature still available for package 1932..,wNote : 3) Pins with this symbol (***) can only be used as single-ended I/O. Please refer to pin-out file for details. .DL^,edNote : 1) Pins with this symbol (*) can be used as clock pins when the transceiver blocks operate at or below 6.375Gbps speed. Quartus II limits use of these clocks when same side transceivers operate above 8.5Gbps speed. bHPLL_R4_CLKN_5A_AY5*/PLL_R4_CLKN !PLL_R4_CLKP_5A_AY6*/PLL_R4_CLKP!4IO_5A_AR10/PLL_R4_CLKOUT0N/DIFFIO_TX_R1N/DIFFOUT_R1N!7IO_5A_AP10/PLL_R4_FB_CLKOUT0P/DIFFIO_TX_R1P/DIFFOUT_R1P((!RDN5A/DIFFIO_RX_R1N/DIFFOUT_R2N<<!RUP5A/DIFFIO_RX_R1P/DIFFOUT_R2PFF!93%*IO_5A_AG15/DQ4R/DIFFIO_TX_R7P/DIFFOUT_R13PZZ!*IO_5A_AH14/DQ4R/DIFFIO_TX_R7N/DIFFOUT_R13Ndd!)IO_5A_AJ14/DQ1R/DIFFIO_TX_R3P/DIFFOUT_R5Pnn!)IO_5A_AK14/DQ1R/DIFFIO_TX_R3N/DIFFOUT_R5Nxx!+IO_5A_AL10/DQ7R/DIFFIO_TX_R12N/DIFFOUT_R23N!+IO_5A_AL11/DQ7R/DIFFIO_TX_R12P/DIFFOUT_R23P!93b%*IO_5A_AL13/DQ5R/DIFFIO_TX_R9P/DIFFOUT_R17P!)IO_5A_AM11/DQ3R/DIFFIO_TX_R5P/DIFFOUT_R9P!##*IO_5A_AM12/DQ3R/DIFFIO_TX_R6P/DIFFOUT_R11P!##)IO_5A_AN11/DQ3R/DIFFIO_TX_R5N/DIFFOUT_R9N!#*IO_5A_AN12/DQ3R/DIFFIO_TX_R6N/DIFFOUT_R11N!%IO_5A_AN6/DIFFIO_RX_R12P/DIFFOUT_R24P!+IO_5A_AN7/DQS7R/DIFFIO_RX_R11P/DIFFOUT_R22P!*'*IO_5A_AN8/DQ7R/DIFFIO_TX_R11N/DIFFOUT_R21N!93*IO_5A_AN9/DQ7R/DIFFIO_TX_R11P/DIFFOUT_R21P!*IO_5A_AP11/DQ5R/DIFFIO_TX_R8P/DIFFOUT_R15P!,IO_5A_AP6/DQSN7R/DIFFIO_RX_R11N/DIFFOUT_R22N!(IO_5A_AP9/DQ1R/DIFFIO_TX_R2P/DIFFOUT_R3P!*IO_5A_AR11/DQ5R/DIFFIO_TX_R8N/DIFFOUT_R15N!'*IO_5A_AR6/DQ6R/DIFFIO_RX_R10P/DIFFOUT_R20P!+IO_5A_AR7/DQSN4R/DIFFIO_RX_R6N/DIFFOUT_R12N""!(IO_5A_AR8/DQ1R/DIFFIO_TX_R2N/DIFFOUT_R3N,,!93?'+IO_5A_AT10/DQ6R/DIFFIO_TX_R10P/DIFFOUT_R19P66!)IO_5A_AT11/DQ2R/DIFFIO_TX_R4P/DIFFOUT_R7P@@!+IO_5A_AT6/DQSN5R/DIFFIO_RX_R8N/DIFFOUT_R16NJJ!*IO_5A_AT7/DQS5R/DIFFIO_RX_R8P/DIFFOUT_R16PTT!*IO_5A_AT8/DQS4R/DIFFIO_RX_R6P/DIFFOUT_R12P^^!*IO_5A_AT9/DQ6R/DIFFIO_TX_R10N/DIFFOUT_R19Nhh!*IO_5A_AU10/DQS2R/DIFFIO_RX_R3P/DIFFOUT_R6Prr!)IO_5A_AU11/DQ2R/DIFFIO_TX_R4N/DIFFOUT_R7N||!+IO_5A_AU8/DQSN3R/DIFFIO_RX_R5N/DIFFOUT_R10N!93:'*IO_5A_AU9/DQS3R/DIFFIO_RX_R5P/DIFFOUT_R10P!+IO_5A_AV10/DQSN2R/DIFFIO_RX_R3N/DIFFOUT_R6N!)IO_5A_AV6/DQ4R/DIFFIO_RX_R7P/DIFFOUT_R14P!*IO_5A_AV7/DQSN1R/DIFFIO_RX_R2N/DIFFOUT_R4N!)IO_5A_AV8/DQS1R/DIFFIO_RX_R2P/DIFFOUT_R4P! '(IO_5A_AW8/DQ2R/DIFFIO_RX_R4N/DIFFOUT_R8N!(IO_5A_AW9/DQ2R/DIFFIO_RX_R4P/DIFFOUT_R8P!+IO_5B_AE16/DQ8R/DIFFIO_TX_R13P/DIFFOUT_R25Pb  !/IO_5B_AF13***/DQ10R/DIFFIO_TX_R16P/DIFFOUT_R31Pb!+IO_5B_AF15/DQ8R/DIFFIO_TX_R13N/DIFFOUT_R25Nb!+IO_5B_AG13/DQ8R/DIFFIO_TX_R14N/DIFFOUT_R27Nb((!+IO_5B_AG14/DQ8R/DIFFIO_TX_R14P/DIFFOUT_R27Pb22!.IO_5B_AJ13***/DQ9R/DIFFIO_TX_R15P/DIFFOUT_R29Pb<<!(IO_5B_AK7***/DIFFIO_RX_R17N/DIFFOUT_R34NbFF!#+'.IO_5B_AL6***/DQS9R/DIFFIO_RX_R14P/DIFFOUT_R28PbPP!*IO_5B_AL8/DQ9R/DIFFIO_RX_R15N/DIFFOUT_R30NbZZ!'*IO_5B_AL9/DQ9R/DIFFIO_RX_R15P/DIFFOUT_R30Pbdd!93-IO_5B_AM6/DQSN10R/DIFFIO_RX_R16N/DIFFOUT_R32Nbnn!,IO_5B_AM7/DQS10R/DIFFIO_RX_R16P/DIFFOUT_R32Pbxx!+IO_5C_AA6/DQ15R/DIFFIO_RX_R24N/DIFFOUT_R48Nb!93'+IO_5C_AA7/DQ16R/DIFFIO_TX_R26N/DIFFOUT_R51Nb!,IO_5C_AC15/DQ12R/DIFFIO_TX_R20P/DIFFOUT_R39Pb!,IO_5C_AD14/DQ14R/DIFFIO_TX_R22P/DIFFOUT_R43Pb!,IO_5C_AD15/DQ12R/DIFFIO_TX_R20N/DIFFOUT_R39Nb!A0IO_5C_AD7***/DQSN16R/DIFFIO_RX_R25N/DIFFOUT_R50Nb!93,IO_5C_AE14/DQ14R/DIFFIO_TX_R22N/DIFFOUT_R43Nb!'/IO_5C_AE6***/DQS17R/DIFFIO_RX_R26P/DIFFOUT_R52Pb!,IO_5C_AF6/DQS14R/DIFFIO_RX_R22P/DIFFOUT_R44Pb!-IO_5C_AG6/DQSN14R/DIFFIO_RX_R22N/DIFFOUT_R44Nb!-IO_5C_AG7/DQSN15R/DIFFIO_RX_R23N/DIFFOUT_R46Nb!/IO_5C_AH6***/DQS13R/DIFFIO_RX_R20P/DIFFOUT_R40Pb!.IO_5C_AJ6***/DQ13R/DIFFIO_RX_R21P/DIFFOUT_R42Pb!,IO_5C_AJ7/DQS12R/DIFFIO_RX_R19P/DIFFOUT_R38Pb!-IO_5C_AK6/DQSN12R/DIFFIO_RX_R19N/DIFFOUT_R38Nb!*IO_5C_Y6/DQ15R/DIFFIO_RX_R24P/DIFFOUT_R48Pb""!93]''0?PEP4S100G5ES1F1932-14EP4S100G5ES1F1932-14.NormalEP4S100G5ES1F1932-14.Normal0(h.pl`^EP4S100G5ES1F1932 (For ES1 silicon only) VERSION : 1.0 PAGE : 14 of 14 DATE : JUNE 2009 h GXB_CMUTX_L0N ! GXB_CMUTX_L0P! GXB_CMUTX_L1N! GXB_CMUTX_L1P((! GXB_CMUTX_L2N22! GXB_CMUTX_L2P<<! GXB_CMUTX_L3NFF!93a GXB_CMUTX_L3PPP!in GXB_CMUTX_L4NZZ! GXB_CMUTX_L4Pdd! GXB_CMUTX_L5Nnn! GXB_CMUTX_L5Pxx!b GXB_CMUTX_L6N! GXB_CMUTX_L6P!93 GXB_CMUTX_L7N! GXB_CMUTX_L7P! GXB_CMUTX_R0N! GXB_CMUTX_R0P! GXB_CMUTX_R1N! GXB_CMUTX_R1P! GXB_CMUTX_R2N! GXB_CMUTX_R2P! GXB_CMUTX_R3N! GXB_CMUTX_R3P!93? GXB_CMUTX_R4N! GXB_CMUTX_R4P! GXB_CMUTX_R5N! GXB_CMUTX_R5P! GXB_CMUTX_R6N""!  GXB_CMUTX_R6P,,! GXB_CMUTX_R7N66! GXB_CMUTX_R7P@@! GXB_RX_L0NTT! GXB_RX_L0P^^! GXB_RX_L10Nhh! GXB_RX_L10Prr! GXB_RX_L11N||! GXB_RX_L11P! GXB_RX_L12N! GXB_RX_L12P! GXB_RX_L13N!93 GXB_RX_L13P! GXB_RX_L14N! GXB_RX_L14P! GXB_RX_L15N! GXB_RX_L15P! GXB_RX_L1N! GXB_RX_L1P! GXB_RX_L2N! GXB_RX_L2P! GXB_RX_L3N!t  GXB_RX_L3P!93 GXB_RX_L4N! GXB_RX_L4P&&! GXB_RX_L5N00! GXB_RX_L5P::! GXB_RX_L6NDD! GXB_RX_L6PNN! GXB_RX_L7NXX! GXB_RX_L7Pbb! GXB_RX_L8Nll! GXB_RX_L8Pvv!93 GXB_RX_L9N! GXB_RX_L9P! GXB_RX_R0N! GXB_RX_R0P! GXB_RX_R10N! GXB_RX_R10P! GXB_RX_R11N! GXB_RX_R11P! GXB_RX_R12N! GXB_RX_R12P! GXB_RX_R13N!93 GXB_RX_R13P! GXB_RX_R14N! GXB_RX_R14P! GXB_RX_R15N  ! GXB_RX_R15P! GXB_RX_R1N  ! GXB_RX_R1P**! GXB_RX_R2N44! GXB_RX_R2P>>! GXB_RX_R3NHH! GXB_RX_R3PRR! GXB_RX_R4N\\! GXB_RX_R4Pff! GXB_RX_R5Npp! GXB_RX_R5Pzz! GXB_RX_R6N! GXB_RX_R6P! GXB_RX_R7N! GXB_RX_R7P! GXB_RX_R8N! GXB_RX_R8P! GXB_RX_R9N! GXB_RX_R9P! GXB_TX_L0Nh  ! GXB_TX_L0Ph!  GXB_TX_L10Nh! GXB_TX_L10Ph((! GXB_TX_L11Nh22!93 GXB_TX_L11Ph<<! GXB_TX_L12NhFF! GXB_TX_L12PhPP! GXB_TX_L13NhZZ! GXB_TX_L13Phdd! GXB_TX_L14Nhnn! GXB_TX_L14Phxx! GXB_TX_L15Nh! GXB_TX_L15Ph! GXB_TX_L1Nh! GXB_TX_L1Ph! GXB_TX_L2Nh! GXB_TX_L2Ph! GXB_TX_L3Nh! GXB_TX_L3Ph! GXB_TX_L4Nh! GXB_TX_L4Ph! GXB_TX_L5Nh! GXB_TX_L5Ph! GXB_TX_L6Nh!93 GXB_TX_L6Ph! GXB_TX_L7Nh! GXB_TX_L7Ph! GXB_TX_L8Nh""! GXB_TX_L8Ph,,! GXB_TX_L9Nh66!93 GXB_TX_L9Ph@@! GXB_TX_R0NhJJ! GXB_TX_R0PhTT! GXB_TX_R10Nh^^! GXB_TX_R10Phhh! GXB_TX_R11Nhrr! GXB_TX_R11Ph||! GXB_TX_R12Nh! GXB_TX_R12Ph! GXB_TX_R13Nh! GXB_TX_R13Ph! GXB_TX_R14Nh! GXB_TX_R14Ph! GXB_TX_R15Nh! GXB_TX_R15Ph! GXB_TX_R1Nh! GXB_TX_R1Ph! GXB_TX_R2Nh! GXB_TX_R2Ph!93r GXB_TX_R3Nh! GXB_TX_R3Ph! GXB_TX_R4Nh! GXB_TX_R4Ph! GXB_TX_R5Nh&&! GXB_TX_R5Ph00! GXB_TX_R6Nh::!93 GXB_TX_R6PhDD! GXB_TX_R7NhNN! GXB_TX_R7PhXX! GXB_TX_R8Nhbb! GXB_TX_R8Phll! GXB_TX_R9Nhvv! GXB_TX_R9Ph!REFCLK_L0N,GXB_CMURX_L0Nh!REFCLK_L0P,GXB_CMURX_L0Ph!REFCLK_L1N,GXB_CMURX_L1Nh!REFCLK_L1P,GXB_CMURX_L1Ph!REFCLK_L2N,GXB_CMURX_L2Nh!REFCLK_L2P,GXB_CMURX_L2Ph!REFCLK_L3N,GXB_CMURX_L3Nh!REFCLK_L3P,GXB_CMURX_L3Ph!REFCLK_L4N,GXB_CMURX_L4Nh!REFCLK_L4P,GXB_CMURX_L4Ph!REFCLK_L5N,GXB_CMURX_L5Nh!REFCLK_L5P,GXB_CMURX_L5Ph!REFCLK_L6N,GXB_CMURX_L6Nh  !REFCLK_L6P,GXB_CMURX_L6Ph!REFCLK_L7N,GXB_CMURX_L7Nh  !REFCLK_L7P,GXB_CMURX_L7Ph**!REFCLK_R0N,GXB_CMURX_R0Nh44!REFCLK_R0P,GXB_CMURX_R0Ph>>!REFCLK_R1N,GXB_CMURX_R1NhHH!93REFCLK_R1P,GXB_CMURX_R1PhRR!REFCLK_R2N,GXB_CMURX_R2Nh\\!REFCLK_R2P,GXB_CMURX_R2Phff!REFCLK_R3N,GXB_CMURX_R3Nhpp!REFCLK_R3P,GXB_CMURX_R3Phzz!REFCLK_R4N,GXB_CMURX_R4Nh!REFCLK_R4P,GXB_CMURX_R4Ph!REFCLK_R5N,GXB_CMURX_R5Nh!REFCLK_R5P,GXB_CMURX_R5Ph!REFCLK_R6N,GXB_CMURX_R6Nh!tREFCLK_R6P,GXB_CMURX_R6Ph!REFCLK_R7N,GXB_CMURX_R7Nh!REFCLK_R7P,GXB_CMURX_R7Ph!RREF_L0h!RREF_L1h!RREF_R0h!RREF_R1h!'0PEP4S100G5ES1F1932-7EP4S100G5ES1F1932-7.NormalEP4S100G5ES1F1932-7.Normal0(.pv]EP4S100G5ES1F1932 (For ES1 silicon only) VERSION : 1.0 PAGE : 7 of 14 DATE : JUNE 2009 :9IO_6A_K11/PLL_R1_FB_CLKOUT0P/DIFFIO_TX_R56P/DIFFOUT_R112P !6IO_6A_L11/PLL_R1_CLKOUT0N/DIFFIO_TX_R56N/DIFFOUT_R112N!8IO_6C_Y14/PLL_R2_FB_CLKOUT0P/DIFFIO_TX_R29P/DIFFOUT_R58P!6IO_6C_AA14/PLL_R2_CLKOUT0N/DIFFIO_TX_R29N/DIFFOUT_R58N((!"RUP6A/DIFFIO_RX_R56P/DIFFOUT_R111P<<!"RDN6A/DIFFIO_RX_R56N/DIFFOUT_R111NFF!93*IO_6A_F7/DQ31R/DIFFIO_RX_R50N/DIFFOUT_R99NZZ!*IO_6A_F8/DQ31R/DIFFIO_RX_R50P/DIFFOUT_R99Pdd!,IO_6A_F9/DQS33R/DIFFIO_RX_R54P/DIFFOUT_R107Pnn!,IO_6A_G10/DQ33R/DIFFIO_RX_R53P/DIFFOUT_R105Pxx!U',IO_6A_G6/DQS31R/DIFFIO_RX_R51P/DIFFOUT_R101P!-IO_6A_G8/DQSN33R/DIFFIO_RX_R54N/DIFFOUT_R107N!93?,IO_6A_H10/DQ33R/DIFFIO_RX_R53N/DIFFOUT_R105N!,IO_6A_H11/DQ34R/DIFFIO_TX_R55P/DIFFOUT_R110P!+IO_6A_H6/DQS30R/DIFFIO_RX_R49P/DIFFOUT_R97P!U',IO_6A_H7/DQSN29R/DIFFIO_RX_R48N/DIFFOUT_R95N!?+IO_6A_H8/DQS29R/DIFFIO_RX_R48P/DIFFOUT_R95P!,IO_6A_H9/DQS32R/DIFFIO_RX_R52P/DIFFOUT_R103P!,IO_6A_J11/DQ34R/DIFFIO_TX_R55N/DIFFOUT_R110N!$IO_6A_J6/DIFFIO_RX_R45P/DIFFOUT_R89P!,IO_6A_J7/DQSN28R/DIFFIO_RX_R46N/DIFFOUT_R91N!+IO_6A_J8/DQS28R/DIFFIO_RX_R46P/DIFFOUT_R91P!-IO_6A_J9/DQSN32R/DIFFIO_RX_R52N/DIFFOUT_R103N!*IO_6A_K8/DQ29R/DIFFIO_RX_R47N/DIFFOUT_R93N!,IO_6A_L10/DQ32R/DIFFIO_TX_R52P/DIFFOUT_R104P!'*IO_6A_L9/DQ29R/DIFFIO_RX_R47P/DIFFOUT_R93P!,IO_6A_M10/DQ32R/DIFFIO_TX_R51P/DIFFOUT_R102P""!+IO_6A_M11/DQ30R/DIFFIO_TX_R48N/DIFFOUT_R96N,,!+IO_6A_M12/DQ30R/DIFFIO_TX_R48P/DIFFOUT_R96P66!+IO_6A_M9/DQ32R/DIFFIO_TX_R52N/DIFFOUT_R104N@@!,IO_6A_N10/DQ32R/DIFFIO_TX_R51N/DIFFOUT_R102NJJ!,IO_6A_N12/DQ31R/DIFFIO_TX_R50P/DIFFOUT_R100PTT!,IO_6A_P13/DQ33R/DIFFIO_TX_R53N/DIFFOUT_R106N^^!+IO_6A_R13/DQ30R/DIFFIO_TX_R49P/DIFFOUT_R98Phh!,IO_6A_R14/DQ33R/DIFFIO_TX_R53P/DIFFOUT_R106Prr!,IO_6A_T15/DQ34R/DIFFIO_TX_R54P/DIFFOUT_R108P||!+IO_6A_U13/DQ28R/DIFFIO_TX_R45N/DIFFOUT_R90N!93eci+IO_6A_U14/DQ28R/DIFFIO_TX_R45P/DIFFOUT_R90P!,IO_6A_U15/DQ34R/DIFFIO_TX_R54N/DIFFOUT_R108N!+IO_6A_V14/DQ28R/DIFFIO_TX_R46N/DIFFOUT_R92N!'+IO_6A_V15/DQ28R/DIFFIO_TX_R46P/DIFFOUT_R92P!'W',IO_6C_AA15/DQ19R/DIFFIO_TX_R31N/DIFFOUT_R62N  !'.IO_6C_K6***/DQS23R/DIFFIO_RX_R38P/DIFFOUT_R75P!.IO_6C_L6***/DQS21R/DIFFIO_RX_R35P/DIFFOUT_R69P!+IO_6C_L7/DQS22R/DIFFIO_RX_R37P/DIFFOUT_R73P((!',IO_6C_M6/DQSN22R/DIFFIO_RX_R37N/DIFFOUT_R73N22!*IO_6C_M8/DQ23R/DIFFIO_TX_R38P/DIFFOUT_R76P<<!+IO_6C_N6/DQS19R/DIFFIO_RX_R32P/DIFFOUT_R63PFF!*IO_6C_N8/DQ23R/DIFFIO_TX_R38N/DIFFOUT_R76NPP!,IO_6C_P6/DQSN19R/DIFFIO_RX_R32N/DIFFOUT_R63NZZ!+IO_6C_P7/DQS20R/DIFFIO_RX_R34P/DIFFOUT_R67Pdd!,IO_6C_R6/DQSN20R/DIFFIO_RX_R34N/DIFFOUT_R67Nnn!-IO_6C_T6***/DQ20R/DIFFIO_RX_R33P/DIFFOUT_R65Pxx!.IO_6C_U6***/DQS18R/DIFFIO_RX_R31P/DIFFOUT_R61P!-IO_6C_U7***/DQ18R/DIFFIO_RX_R30N/DIFFOUT_R59N!+IO_6C_V13/DQ23R/DIFFIO_TX_R37N/DIFFOUT_R74N!+IO_6C_W14/DQ23R/DIFFIO_TX_R37P/DIFFOUT_R74P!+IO_6C_Y15/DQ19R/DIFFIO_TX_R31P/DIFFOUT_R62P!?'0PEP4S100G5ES1F1932-8EP4S100G5ES1F1932-8.NormalEP4S100G5ES1F1932-8.Normal0(.p6*]EP4S100G5ES1F1932 (For ES1 silicon only) VERSION : 1.0 PAGE : 8 of 14 DATE : JUNE 2009 |&IO_7C_N22/PLL_T2_CLKOUT0N/DIFFOUT_T61N !&IO_7C_N21/PLL_T2_CLKOUT0P/DIFFOUT_T61P!8IO_7C_L20/PLL_T2_FBP/CLKOUT1/DIFFIO_RX_T31P/DIFFOUT_T62P!8IO_7C_K20/PLL_T2_FBN/CLKOUT2/DIFFIO_RX_T31N/DIFFOUT_T62N((!%IO_7C_N20/PLL_T2_CLKOUT3/DIFFOUT_T59P22!%IO_7C_P20/PLL_T2_CLKOUT4/DIFFOUT_T59N<<!&RDN7A/DIFFIO_RX_T1N/DIFFOUT_T2N/DQSN1TPP!%RUP7A/DIFFIO_RX_T1P/DIFFOUT_T2P/DQS1TZZ!*IO_7A_A13/DQSN2T/DIFFIO_RX_T2N/DIFFOUT_T4Nnn!IO_7A_B10/DQ1T/DIFFOUT_T1Nxx!IO_7A_B11/DQ1T/DIFFOUT_T3P!w')IO_7A_B13/DQS2T/DIFFIO_RX_T2P/DIFFOUT_T4P!93lt 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