このページでは、Quartus II 開発ソフトウェアで利用可能な SOPC Builder の関連資料を提供します。「SOPC Builder ユーザー・ガイド」は、 SOPC Builder のすべての機能、完全なリファレンス使用方法、そしてカスタム・システムの構築のためのチュートリアルを提供します。SOPC Builder とその他関連資料については、以下をご覧下さい。SOPC Builder サポートにつきましては、「SOPC Builder サポート」のページをご覧ください。
Avalon インタフェースについては、Avalon Interface Specifications (PDF・英語版) をご覧ください。
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SOPC Builder User Guide (ver 1.0, Dec 2010, 2 MB)
Embedded Design Handbook (ver 2.9, Jul 2011, 7 MB)
Chapter 1. First-Time Designer's Guide (ver 2.3, Jul 2011, 416 KB) - Chapter 2. Developing Nios II Software (ver 1.4, Jul 2011, 685 KB)
- Chapter 3. Debugging Nios II Designs (ver 1.3, Dec 2009, 480 KB)
- Chapter 4. Nios II Command-Line Tools (ver 2.2, Jul 2011, 208 KB)
- Chapter 5. Optimizing Nios II C2H Compiler Results (ver 1.2, Jul 2011, 892 KB)
- Chapter 6. SOPC Builder Design Optimizations (ver 1.2, Jul 2011, 1 MB)
- Chapter 7. Memory System Design (ver 1.2, Feb 2010, 307 KB)
- Chapter 8. Hardware Acceleration and Coprocessing (ver 1.2, Jul 2011, 638 KB)
- Chapter 9. Verification and Board Bring-Up (ver 1.3, Jul 2011, 517 KB)
- Chapter 10. Interfacing an External Processor to an Altera FPGA (ver 1.1, Jul 2011, 553 KB)
- Chapter 11. Avalon-MM Byte Ordering Considerations (ver 1.1, Jul 2011, 835 KB)
Section I. Introduction
Section II. Nios II Software Development
Section III. System Level Design
関連資料
Nios II Hardware Development
- Nios II Custom Instruction User Guide (ver 2.0, Feb 2011, 1 MB)
- Nios II Hardware Development Tutorial (ver 4.0, May 2011, 1 MB)
Design Files for Nios II Hardware Development Tutorial (14 KB)
- AN 531: Reducing Power with Hardware Accelerators (ver 1.0, May 2008, 151 KB)
Design Files for AN 531 (1 MB)
Benchmarking and Design Migration Techniques
- Comparing IP Integration Approaches for FPGA Implementation (ver 1.1, Feb 2008, 195 KB)
SOPC Builder System Development
- FPGA システム設計における、ネットワーク・オン・チップ・アーキテクチャの利点 (ver 1.1, Jul 2011, 801 KB)
- Applying the Benefits of Network on a Chip Architecture to FPGA System Design (ver 1.1, May 2011, 549 KB)
- Comparing IP Integration Approaches for FPGA Implementation (ver 1.1, Feb 2008, 195 KB)
- Embedded Peripherals IP User Guide (ver 11.0, Jun 2011, 6 MB)
- Avalon Verification IP Suite User Guide (ver 3.0, May 2011, 5 MB)
(Includes SOPC Buider and Qsys tutorials)
Avalon Verification IP Suite Design Files (23 KB)
- Qsys システム・デザイン・チュートリアル (ver 2.0, Aug 2011, 1 MB)
- Qsys System Design Tutorial (ver 2.0, May 2011, 1,015 KB)
- Nios II System Architect Design Tutorial (ver 2.0, Jun 2011, 2 MB)
Nios II Architect Design Tutorial Design Files (5 MB)
- Qsys システム統合ツール (ver 2.0, Jun 2011, 216 KB)
- Qsys System Integration Tool (ver 2.0, May 2011, 372 KB)
- AN632: SOPC Builder からQsys への移行のガイドライン (ver 2.0, Dec 2011, 327 KB)
- AN 632: SOPC Builder to Qsys Migration Guidelines (ver 2.0, May 2011, 271 KB)
- AN624: Debugging with System Console Over TCP/IP (ver 1.0, Aug 2010, 423 KB)
- AN 458: Nios IIブート方法の応用 (ver 1.0, Jun 2008, 575 KB)
AN458 design example files (30 KB)
Default boot loader sources (17 KB)
- AN458: Alternative Nios II Boot Methods (ver 2.1, May 2011, 514 KB)
AN458 design example files (36 KB)
- AN 446: Debugging Nios II Systems with the SignalTap II Embedded Logic Analyzer (ver 2.0, Jun 2011, 397 KB)
signal_tap_test software file (9 KB)
- AN 398: Using DDR/DDR2 SDRAM With SOPC Builder (ver 1.1, Aug 2006, 775 KB)
- AN 346: Using the Nios II Configuration Controller Reference Designs (ver 1.2, Mar 2009, 793 KB)
- AN 323: Using SignalTap II Embedded Logic Analyzers in SOPC Builder Systems (ver 1.1, Nov 2007, 386 KB)
