オンライン資料: Arria V デバイス

PowerPlay Early Power Estimator

日本語版資料は、英語版を翻訳したもので、内容に相違が生じる場合には原文を優先します。
こちらの日本語版は参考用としてご利用ください。設計の際には、最新の英語版で内容をご確認ください。

SoC FPGA 資料

Arria V ハンドブック

Arria V Device Handbook (17 MB)

Arria V Device Handbook, Volume 1: Device Overview and Datasheet (ver 1.3, Feb 2012, 2 MB)

Chapter 1. Overview for Arria V Device Family (ver 1.3, Feb 2012, 525 KB)
Chapter 2. Device Datasheet for Arria V Devices (ver 1.3, Feb 2012, 1,005 KB)
- Arria V I/O Timing Spreadsheet

Arria V Device Handbook, Volume 2: Device Interfaces and Integration (ver 1.3, Feb 2012, 5 MB)

Section I. Device Core for Arria V Devices

Chapter 1. Logic Array Blocks and Adaptive Logic Modules in Arria V Devices (ver 1.1, Nov 2011, 617 KB)
Chapter 2. Memory Blocks in Arria V Devices (ver 1.1, Nov 2011, 200 KB)
Chapter 3. Variable Precision DSP Blocks in Arria V Devices (ver 1.1, Nov 2011, 315 KB)
Chapter 4. Clock Networks and PLLs in Arria V Devices (ver 1.1, Nov 2011, 818 KB)
- Chapter 5. I/O Features in Arria V Devices (ver 1.2, Feb 2012, 540 KB)
- Chapter 6. High-Speed Differential I/O Interfaces and DPA in Arria V Devices (ver 1.1, Nov 2011, 794 KB)
- Chapter 7. External Memory Interfaces in Arria V Devices (ver 1.1, Nov 2011, 765 KB)

Section III. System Integration for Arria V Devices

Chapter 8. Configuration, Design Security, and Remote System Upgrades in Arria V Devices (ver 1.1, Nov 2011, 213 KB)
Chapter 9. SEU Mitigation in Arria V Devices (ver 1.1, Nov 2011, 151 KB)
Chapter 10. JTAG Boundary-Scan Testing in Arria V Devices (ver 1.2, Feb 2012, 131 KB)
Chapter 11. Power Management in Arria V Devices (ver 1.3, Feb 2012, 127 KB)

Arria V Device Handbook, Volume 3: Transceivers (ver 1.1, Nov 2011, 5 MB)

Chapter 1. Transceiver Architecture in Arria V Devices (ver 1.1, Nov 2011, 1 MB)
Chapter 2. Transceiver Clocking in Arria V Devices (ver 1.1, Nov 2011, 1 MB)
Chapter 3. Transceiver Reset Control and Power Down in Arria V Devices (ver 1.1, Nov 2011, 370 KB)
Chapter 4. Transceiver Protocol Configurations in Arria V Devices (ver 1.1, Nov 2011, 1 MB)
Chapter 5. Transceiver Custom Configurations in Arria V Devices (ver 1.1, Nov 2011, 878 KB)
Chapter 6. Transceiver Loopback Support in Arria V Devices (ver 1.1, Nov 2011, 350 KB)
Chapter 7. Dynamic Reconfiguration in Arria V Devices (ver 1.1, Nov 2011, 141 KB)

Arria V Device Handbook, Volume 4: Device Basics (ver 1.2, Dec 2011, 6 MB)

Chapter 1. Device Interfaces and Integration Basics for Arria V Devices (ver 1.2, Dec 2011, 5 MB)
Chapter 2. Transceiver Basics for Arria V Devices (ver 1.1, Nov 2011, 1 MB)

関連資料

外部メモリ・インタフェース

Using External Memory Interfaces to Achieve Efficient High-Speed Memory Solutions (ver 1.0, Nov 2011, 589 KB)

消費電力 & 熱管理

Meeting the Low Power Imperative at 28 nm (ver 2.0, Nov 2011, 974 KB)
PowerPlay Early Power Estimator User Guide (ver 6.0, Jan 2012, 2 MB)
AN657: Thermal Management and Mechanical Handling for Altera FCmBGA Devices (ver 1.0, Jan 2012, 1 MB)

I/O インタフェース、プロトコル、シグナル・インテグリティ

Arria V Hard IP for PCI Express User Guide (ver 1.0, Nov 2011, 4 MB)
AN653: Implementing the CPRI Protocol using the Deterministic Latency Transceiver PHY IP Core (ver 1.0, Jan 2012, 856 KB)
an653_Reference_Design_File (346 KB)

デバイス・コンフィギュレーション & リモート・システム・アップグレード

Configuration via Protocol (CvP) Implementation in Altera FPGAs User Guide (ver 1.1, Feb 2012, 2 MB)

デザイン・ガイドライン

Tips and Techniques for 28-nm Design Optimization (ver 1.0, Nov 2011, 704 KB)

PCB レイアウト & パッケージ

AN659: Thermal Management and Mechanical Handling for Lidless Flip Chip Ball-Grid Array (ver 1.0, Mar 2012, 980 KB)
(This application note provides guidance on thermal management and mechanical handling of lidless flip chip ball-grid array (FCBGA) for Altera devices. )
AN657: Thermal Management and Mechanical Handling for Altera FCmBGA Devices (ver 1.0, Jan 2012, 1 MB)

エンド・アプリケーション

A Validated Methodology for Designing Safe Industrial Systems on a Chip (ver 1.0, Sep 2011, 371 KB)

一般デバイス資料

Designing Polyphase DPD Solutions with 28-nm FPGAs (ver 1.0, Jan 2012, 800 KB)
ソフトウェアの開発を今日から開始できる SoC FPGA Virtual Target (ver 1.0, Oct 2011, 230 KB)

ver 1.0, Oct 2011, 370 KB
Robust Image Format Conversion Solutions (ver 1.0, Nov 2011, 240 KB)
Altera QAM Design Solution for HD Video (ver 1.0, Nov 2011, 339 KB)
ワンチップ SoC FPGA による産業用モーター・ドライブ (ver 1.0, Oct 2011, 239 KB)

ver 2.0, Mar 2012, 370 KB
アルテラの ARM ベース SoC FPGA　～ユーザーによるカスタマイズが可能～ (ver 1.0, Oct 2011, 1 MB)

ver 1.0, Oct 2011, 3 MB

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