A DSP designer is a hardware engineer implementing a digital signal processing (DSP) application using an FPGA. These engineers include engineers and scientists working on DSP modeling, software and hardware implementation and optimizing algorithms on an FPGA architecture.
| Table Legend | |
| Required if no prior experience | |
| Optional | |
| Suggested | |
| Instructor-led Training | Online Training | ||||||
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| Designing with DSP Builder (IDSP210) (8 hours) |
and/ or | Designing with DSP Builder Advanced Blockset (IDSP220) (8 hours) |
Read Me First! (ORMF1000) (0.5 hours) |
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| Introduction to VHDL (IHDL110) (8 hours) |
or | Introduction to Verilog HDL (IHDL120) (8 hours) |
DSP System Design with DSP Builder (ODSP1110) (1 hour) |
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| The Quartus ® II Software Design Series: Foundation (IDSW110) ((8 hours) |
DSP System Design with DSP Builder Using the Advanced Block Set (ODSP1115) (1 hour) |
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| Using SOPC Builder (OEMB1115) (1 hour) 简体中文 (OCEMB1115) |
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| Using Cascaded-Integrator- Comb Filter in Multirate Digital Systems (OCIC1110) (1 hour) |
Viterbi Decoder (OVTBI1110) (1 hour) |
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| If you wish to target specific features in the FPGA you may wish to go through the FPGA designer curriculum at this point. If your application uses an embedded processor you may wish to go through one of the embedded curriculums at this point. | |||||||
